PECL/LVDS/CMOS OUTPUT SMD CRYSTAL CLOCK OSCILLATOR RoHS ALD SERIES Pb 5.0 x 7.0 x 1.8m m Compliant | | | | | | | | | | | | | | | FEATURES: APPLICATIONS: • Based on a proprietary digital multiplier • 2.5V to 3.3V +/- 5% operation • SONET, xDSL • Tri-State Output • Ceramic SMD, low profile package • SDH, CPE • Low Phase Noise and Jitter • STB • 156.25MHz, 187.5MHz, and 212.5MHz applications STANDARD SPECIFICATIONS: P ARAMETERS ABRACON P/N: ALD Series Frequency range: 750 kHz to 800 MHz Operating temperature: 0° C to + 70° C (see options) Storage temperature: - 55° C to + 125° C Overall frequency stability: ± 50 ppm max. (see options) Supply voltage (Vdd): 3.3V ±10% (see options) Jitter: RMS phase jitter 3ps typ., <5ps max. (12KHz - 20MHz) Period jitter peak to peak ,35ps typical Low Phase Noise: -109 dBc/Hz @ 1kHz Offset from 622.08MHz -110 dBc/Hz @ 10kHz Offset from 622.08MHz -109 dBc/Hz @ 100KHz Offset from 622.08MHz -112 dBc/Hz @ 1kHz Offset from 155.52MHz -125 dBc/Hz @ 10kHz Offset from 155.52MHz -123 dBc/Hz @ 100KHz Offset from 155.52MHz Tristate Function: "1" (V ≥ ≥ 0.7*Vdd) or open: Oscillation IH "0" (V < 0.3*Vdd): No Oscillation / Hi Z IL Supply current (I ): 65mA max (for 750kHz < Fo < 96MHz), 100mA max (96MHz ≤ Fo < 800MHz) PECL: DD Output Logic High: V -1.025V min, V -0.880V max. dd dd Output Logic Low: V -1.810V min. V -1.620V max. dd dd Symmetry (Duty Cycle): 45% min, 50% typ, 55% max, Rise time: 0.85ns Fall time: 0.85ns Supply current (I ): 65mA max (for 750kHz < Fo < 96MHz), 100mA max (96MHz ≤ Fo < 800MHz) DD LVDS Output Clock Duty Cycle @ 1.25V: 45% min, 50% typical, 55% max Output Differential Voltage (V ): 247mV min, 355mV typical, 454mV max OD VDD Magnitude Change (ΔV ): -50mV min, 50mV max OD Output High Voltage : V = 1.4V typical, 1.6V max. OH Output Low Voltage: V = 0.9V min, 1.1V typical OL Offset Voltage [R = 100Ω]: V = 1.125V min, 1.2V typical, 1.375V max L OS Offset Magnitude Change [R = 100Ω]: ΔV = 0mV min, 3mV typical, 25mV max L OS Power-off Leakage (I ) [Vout=VDD or GND, VDD=0V] = ±1μA typical, ±10μA max. OXD Differential Clock Rise Time (t ) [R =100Ω, CL=10pF]: 0.2nS min, 0.7nS typical, 1.0nS,max r L Differential Clock Fall Time (t ) [R =100Ω, CL=10pF]: 0.2nS min, 0.7nS typical, 1.0nS max f L Supply current (I ):15mA max (for 750kHz < Fo < 24MHz), 30mA max (for 24MHz ≤ Fo < 96MHz), DD CMOS: 65mA max (96MHz ≤ Fo < 800MHz) Output Clock Rise/ Fall Time [10%~90% VDD with 10pF load]: 5.0ns max (for 750kHz < Fo < 24MHz) 5.0ns max (for 24MHz ≤ Fo < 800MHz) Output Clock Duty Cycle [Measured @ 50% VDD]: 45% min, 50% typical, 55% max Visit www.abracon.com for Terms & Conditions of Sale Revised: 05.20.10 ABRACON IS ABRACON IS 3033 2 E s p er anza , R an ch o S an ta Mar g ar ita , Ca lif o r nia 9268 8 ISO9001:2008 CE CER RTIFIED TIFIED tel 949-546-8000 | f ax 949-546-800 1 | ww w. abra c on .c o m PECL/LVDS/CMOS OUTPUT SMD CERAMIC SMD CRYSTAL CLOCK OSCILLATOR CRYSTAL CLOCK OSCILLATOR ALD SERIES RoHS Pb 5 .0 x 7 . 0 x 1 .8m m Compliant | | | | | | | | | | | | | | | OPTIONS AND PART IDENTIFICATION (Left blank if standard) ALD - - MHz - - - - - Supply Voltage Packaging T: Tape & Reel (1000pcs) Blank*: 3.3V 2: 2.5V Tristate Option Frequency in MHz A: Pin 1 = NC e.g. 4.000MHz Pin 2 = tristate 8.1592MHz 26.000MHz Output Operating Temp. P: PECL Freq. Stability Blank*: 0ºC to +70ºC P1: PECL1 D: -10ºC to +60ºC Blank*: ±50ppm V: LVDS E: -20ºC to +70ºC R: ±25ppm C: CMOS F: -30ºC to +70ºC K: ±30ppm N: -30ºC to +85ºC H: ±35ppm L: -40ºC to +85ºC *Standard specification TRI-STATE PIN OUT DESCRIPTION : OUTPUT TYPE OPTION PIN 1 logic level* Output State 0 (Default) Enabled P PECL 1 Tri-state 1 (Default) Enabled P1 PECL1 0 Tri-state 0 Tri-state V LVDS 1(Default) Enabled 0 Tri-state C CMOS 1(Default) Enabled *Connect to VDD for logic level "1", connect to ground for logic level "0". Visit www.abracon.com for Terms & Conditions of Sale Revised: 05.20.10 ABRACON IS ABRACON IS ISO9001:2008 3033 2 E s p er anza , R an ch o S an ta Mar g ar ita , Ca lif o r nia 9268 8 CE CER RTIFIED TIFIED tel 949-546-8000 | f ax 949-546-800 1 | ww w. abra c on .c o m PECL/LVDS/CMOS OUTPUT SMD CERAMIC SMD CRYSTAL CLOCK OSCILLATOR CRYSTAL CLOCK OSCILLATOR ALD SERIES RoHS Pb 5 .0 x 7 . 0 x 1 .8m m Compliant | | | | | | | | | | | | | | | OUTLINE DIMENSIONS: PECL, LVDS PIN # Name DESRIPTION 1 Tri-state / NC Tristate or No Connect 2 NC / Tristate No Connect / Tristate 3 GND Ground 4 Q PECL, LVDS 5 Q Complimentary PECL,LVDS 6 V VDD Connection. DD Note: Recommend using an approximately 0.01uF bypass capacitor between PIN 3 and 6. CMOS PIN # Name 1 Tri-state 2 GND 3 OUTPUT 4 Vdd Dimensions: inches (mm) Visit www.abracon.com for Terms & Conditions of Sale Revised: 05.20.10 ABRACON IS ABRACON IS 3033 2 E s p er anza , R an ch o S an ta Mar g ar ita , Ca lif o r nia 9268 8 ISO9001:2008 CE CER RTIFIED TIFIED tel 949-546-8000 | f ax 949-546-800 1 | ww w. abra c on .c o m Dimension : mm PECL/LVDS/CMOS OUTPUT SMD CERAMIC SMD CRYSTAL CLOCK OSCILLATOR CRYSTAL CLOCK OSCILLATOR ALD SERIES RoHS Pb 5 .0 x 7 . 0 x 1 .8m m Compliant | | | | | | | | | | | | | | | TAPE AND REEL: T= tape and reel (1,000pcs/reel) Dimension : mm REFLOW PROFILE: NOTE: Abracon manufactured products are intended for general commercial and industrial use. For applications requiring high reliability and/or presenting extreme operating environment, written consent & authorization from Abracon is required. Visit www.abracon.com for Terms & Conditions of Sale Revised: 05.14.10 ABRACON IS ABRACON IS 3033 2 E s p er anza , R an ch o S an ta Mar g ar ita , Ca lif o r nia 9268 8 ISO9001:2008 CE CER RTIFIED TIFIED tel 949-546-8000 | f ax 949-546-800 1 | ww w. abra c on .c o m Dimension : mm