POWER PTH04040 Data Sheet 3.3 / 5.0 Vin Single Output Total Power: 150 Watts Input Voltage: 2.95 - 5.5 Vdc # of Outputs: Single SPECIAL FEATURES (7) ƒ 60 A output current ƒ 3.3/5 V input voltage (2.95 - 5.5 Vdc) ƒ Wide-output voltage adjust (0.8 V - 2.5 V) ™ ƒ Auto-track sequencing* Electrical Specifications ƒ Margin up/down controls Input ƒ Efficiencies up to 93% Input voltage ra nge (See Note 3, 5) 2.95 - 5.5 V ƒ Output ON/OFF inhibit Input standby current 60 mA typical ƒ Differential remote sense Remote ON/OFF (See Note 5) Negative logic ƒ Programmable input Under-Voltage Undervoltage lockout (See Note 6) 6.6 - 7.5 Vdc typical Lockout (UVLO) (Pin 8 open) On threshold 2.60 V Hysteresis 0.6 V ƒ Point-of-Load-Alliance (POLA) Track input voltage Pin 18 (See Note 2) -0.11 mA compatible ƒ RoHS compliant Output ƒ Two year warranty Voltage adjustability 2.95 < Vi < 4.5 V 0.8 - 1.65 Vdc 4.50 < Vi < 5.5 V 0.8 - 2.5 Vdc Setpoint accuracy (See Note 1) ±2.0% Vo SAFETY Line regulation ±5 mV typical ƒ UL/cUL CAN/CSA-C22.2 No. 60950 Load regulation ±5 mV typical ƒ File No. E174104 Total regulation (See Note 1) ±3.0% Vo ƒ TÜV Product Service (EN60950) Certificate No. B04 06 38572 044 Minimum load 0 A ƒ CB report and certificate to Ripple and noise 20 MHz bandwidth 15 mV typical IEC60950, Certificate No. US/8292/ Transient response (See Note 4) 100 μs recovery time UL Overshoot/undershoot 200 mV Margin adjustment (See Note 8) ±5.0% Vo All specifications are typical at nominal input, full load at 25 °C unless otherwise stated. Cin = 1000 μF, Cout = 660 μF. *Auto-track is a trademark of Texas Instruments. PTH04040 Data Sheet EMC Characteristics General Specifications Electrostatic discharge EN61000-4-2, IEC801-2 Efficiency (See Efficiency Table) 93% max. Conducted immunity EN61000-4-6 Insulation voltage Non-isolated Radiated immunity EN61000-4-3 Switching frequency 825 MHz Approvals and EN60950, UL/cUL60950 standards Environmental Specifications Material flammability UL94V-0 Thermal performance Operating ambient temperature -40 °C to +85 °C Non-operating temperature -40 °C to +125 °C Dimensions L x W x H 51.94 x 26.54 x 9.07 mm 2.045 x 1.045 x 0.357 in MSL (‘Z’ suffix only) JEDEC J-STD-020C Level 3 Weight 22.5 g (79 oz) Protection MTBF Telcordia SR-332 2,100,000 hours Short-circuit Auto reset 90 A typical Thermal Auto recovery Ordering Information Regulation Model Output Power Input Output Output Current Output Current Efficiency (9) Number (Max.) Voltage Voltage (Min.) (Max.) (Typical) Line Load PTH04040W 150 W 2.95 - 5.5 V 0.8 - 2.5 V 0 A 60 A 93% ±5 mV ±5 mV Part Number System with Options Product Family Input Voltage Mechanical Output Voltage Pin Option Mounting Options Output Current Package Code PTH 04 04 0 W A S Point-of-Load 04 = 2.95 - 5.5 Vdc 04 = 60 A Always 0 W = Wide D = Horizontal through- Alliance compatible hole (Matte Sn) Z = Surface-mount (96.5/3.0/0.5 Sn/Ag/Cu pin solder material Notes: Output Voltage Adjustment 1. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/ºC or better The ultra-wide output voltage trim range offers major advantages to users who temperature stability. select the PTH04040W. It is no longer necessary to purchase a variety of modules in order to cover different output voltages. The output voltage can be 2. This control pin has an internal pull-up to Vin nominal. If it is left open-circuit the module will trimmed in a range of 0.8 Vdc to 2.5 Vdc. When the PTH04040W converter operate when input power is applied. A small low-leakage (<100 nA) MOSFET is recommend leaves the factory the output has been adjusted to the default voltage of 0.8 V. for control. For further information, consult Application Note 192. 3. A 1000 μF input capacitor is required for proper operation. The capacitor must be rated for a minimum of 400 mA rms of ripple current. 4. This is with a 1 A/μs loadstep, 50 to 100% Iomax. Co = 660 μF. 5. The minimum input voltage is 2.95 V or 1.34 x Vo, whichever is greater. Efficiency Table (Io = 45 A; Vin = 5 V) 6. These are default voltages. They may be adjusted using the ‘UVLO Prog.’ control input. Consult Output Voltage Efficiency Application Note 192 for further details. Vo = 1.2 V 86% 7. See Figures 1 and 2 for safe operating curves. All power pins must be used. Vo = 1.5 V 88% 8. A small low-leakage (<100 nA) MOSFET is recommended to control this pin. The open-circuit Vo = 1.8 V 90% voltage is less than 1 Vdc. Vo = 2.5 V 93% 9. NOTICE: Some models do not support all options. Please contact your local Artesyn representative or use the on-line model number search tool at http://www.artesyn.com/power to find a suitable alternative. PTH04040 Data Sheet 90 90 80 80 70 70 Nat conv Nat conv 60 60 200 LFM 200 LFM 400 LFM 400 LFM 50 50 40 40 30 30 20 20 0 10 20 30 40 50 60 0 10 20 30 40 50 60 OUTPUT CURRENT (A) OUTPUT CURRENT (A) Figure 1 - Safe Operating Area Figure 2 - Safe Operating Area Vin = 3.3 V (See Note A) Vin = 5 V (See Note A) 100 100 90 90 Vout Vout 1.5V 2.5V 80 80 1.0V 1.8V 1.5V 1.2V 70 70 60 60 50 50 0 10 20 30 40 50 60 0 10 20 30 40 50 60 OUTPUT CURRENT (A) OUTPUT CURRENT (A) Figure 3 - Eciency vs Load Current Figure 4 - Eciency vs Load Current Vin = 5 V (See Note B) Vin = 3.3 V (See Note B) Notes: A. SOA curves represent the conditions at which internal components are within the Artesyn derating guidelines. 19 20 18 Ma rgin Ma rgin Track 11 B. Characteristic data has been developed from actual products tested at 25 °C. This data is +Sense up Down 2 9 considered typical data for the converter. Vin 4 12 Vo Vin Vo 6 15 8 14 UVLO -Sense Inhibit GND GND Vo Adj 16 7 1 3 5 10 13 17 Rset 1% Ci Co1 0.05W Co2 1,000µF 330µF 330µF (Requi red) Figure 5 - Standard Application E FFIC IE NC Y (% ) T E MP E R AT UR E (ºC ) E FFIC IE NC Y (% ) T E MP E R AT UR E (ºC ) PTH04040 Data Sheet Mechanical Drawings Plated through-hole 2.045 (51.94) 0.060 (1.52) 1.875 (47.62) Pin Assignments 0.375 0.375 (9.52) (9.52) Pin Function 0.140 0.125 (3.17) 0.375 (3.55) 6 Places 1 Ground (9.52) 0.060 ø0.040 (1.02) 2 Vin (1.52) 20 Places 3 Ground 17 16 15 14 13 12 11 10 9 8 4 Vin 18 0.125 19 5 Ground (3.17) Lowest 20 3 Places 1.045 Component 6 Vin 0.925 (26.54) 0.010 MIN. (23.49) 7 Inhibit* (0.25) Bottom side 8 UVLO Programming C learance 1 2 3 4 5 6 7 9 Vout 10 Ground 0.375 Host Board 0.125 (3.17) 0.375 11 Vs+ (9.52) (9.52) 0.375 0.250 12 Vout (9.52) 0.357 (9.07) (6.35) MAX. 2 Places 13 Ground SIDE VIEW TOP VIEW 14 Vs- Dimensions in Inches (mm) Tolerances (unless otherwise specied) 15 Vout 2 Places ±0.030 (±0.76) 16 Ground 3 Places ±0.010 (±0.25) 17 Adjust 18 Track 19 Margin up* 20 Margin down* *Denotes negative logic: Surface-mount Open = Normal operation Ground = Function active 2.045 (51.94) 0.060 (1.52) 1.875 (47.62) 0.375 0.375 (9.52) (9.52) 0.125 (3.17) 0.375 0.370 (9.40) 6 Places MAX. After solder reow (9.52) 0.060 on customer board (1.52) 17 16 15 14 13 12 11 10 9 8 Solder Ball 18 0.125 ø0.040 (1.02) 19 (3.17) 20 Places 20 1.045 3 Places 0.925 (26.54) (23.49) 1 2 3 4 5 6 7 0.375 (3.17) 0.375 0.125 (9.52) (9.52) 0.375 SIDE VIEW 0.250 (9.52) (6.35) 2 Places TOP VIEW Dimensions in Inches (mm) Tolerances (unless otherwise specied) 2 Places ±0.030 (±0.76) 3 Places ±0.010 (±0.25) WORLDWIDE OFFICES Asia (HK) Americas Europe (UK) 14/F, Lu Plaza 2900 S.Diablo Way Waterfront Business Park 2 Wing Yip Street Tempe, AZ 85282 Merry Hill, Dudley Kwun Tong, Kowloon USA West Midlands, DY5 1LX Hong Kong +1 888 412 7832 United Kingdom www.artesyn.com +852 2176 3333 +44 (0) 1384 842 211 While every precaution has been taken to ensure accuracy and completeness in this literature, Artesyn For more information: www.artesyn.com/power Embedded Technologies assumes no responsibility, and disclaims all liability for damages resulting from use For support: productsupport.ep@artesyn.com of this information or for any errors or omissions. Artesyn Embedded Technologies, Artesyn and the Artesyn Embedded Technologies logo are trademarks and service marks of Artesyn Embedded Technologies, Inc. All other names and logos referred to are trade names, trademarks, or registered trademarks of their respective owners. © 2015 Artesyn Embedded Technologies, Inc. PTH04040 22Apr2015