MURATA POWER SOLUTIONS OKDX-T/90-W12-001-C
Description
Non-Isolated DC/DC Converters 90A Digital PoL DC- DC Converter SIP
Part Number
OKDX-T/90-W12-001-C
Price
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Manufacturer
MURATA POWER SOLUTIONS
Lead Time
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Category
Capacitors » DC-DC Converter
Specifications
Manufacturer
Murata Power Solutions
Manufacturers Part #
OKDX-T/90-W12-001-C
Industry Aliases
Series
OKDx-T/90-W12
Factory Pack Quantity
144
Dimensions
2.00 x 0.75 x 0.37"
Efficiency
94.3%
Mechanical Style
Non-Isolated / POL
Mounting
Through Hole
Operating Temperature
- 40 to + 150°C
Output Amps 1
90 A
Power
162 W
Subcategory
DC-DC Converter
Datasheet
Extracted Text
OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Typical units FEATURES PRODUCT OVERVIEW Input voltage range of 7.5 to 14Vdc The OKDx-T/90-W12 series are high efficiency, digital Apart from standard PoL performance and safety Point-of-Load (PoL) DC-DC power converters capable features like OVP, OCP, OTP, and UVLO, these 0.6 V - 1.8 V output voltage range digital converters have advanced features: digital of delivering 90A/162W. Available in three different High efficiency, typ. 94.3% at 12Vin, current sharing (full power, no derating), non-linear package formats, Surface Mount, Through-Hole and 1.8Vout half-load transient response, optimized dead time control, Single-Inline-Package, these converters have a TH package: 50.8 x 19.05 x 10.0 mm synchronization, and phase spreading. These typical efficiency of 94.3%. PMBus™ compatibility converters are ideal for use in telecommunications, (2.0 x 0.75 x 0.39 in) SIP: 50.8 x 9.51 x allows monitoring and configuration of critical networking, and distributed power applications. 19.05 mm (2.0 x 0.37 x 0.75 in) system-level performance requirements. Configuration & Monitoring via PMBus™ Synchronization & phase spreading Current sharing, Voltage Tracking & Applications Power Management via PMBus™ Voltage margining Configurable soft-start/stop Distributed power architectures MTBF 14.95 Mhrs Configurable output voltage (Vout) and voltage Intermediate bus voltage applications Non-Linear Response for reduction of margins (Margin low and Margin high) Servers and storage applications decoupling capacitor Configurable protection limits for OVP, input over Network equipment Remote On/Off control & Power Good voltage, input under voltage, over current, on/off, Output short-circuit, output over and temperature voltage, & over temperature protection Status monitor Vout, Iout, Vin, Temp, Power Good, Certified to UL/IEC 60950-1 and On/Off PART NUMBER STRUCTURE OKD x - T / 90 - W12 E - xxx - C RoHS Hazardous Digital Non-isolated PoL Substance Compliance C = RoHS-6 Y = Surface Mount (does not claim EU RoHS exemption 7b – lead in solder) H = Horizontal Mount Through-Hole X = SIP Software Configuration Digits (001 is positive turn-on logic) (002 is negative turn-on logic)* Trimmable Output Voltage Range SIP Version only 0.6 - 1.8Vdc E = 5.5mm Pin Length* Blank = 4.0mm Pin Length *Special quantity order is required; contact Murata Power Solutions for Maximum Rated Output Input Voltage Range MOQ and lead times. Current in Amps 7.5-14Vdc www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 1 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Ordering Guide Model Number Package Type Output Input Range On/Off Logic OKDY-T/90-W12-001-C Surface Mount 7.5V to 14V Positive OKDH-T/90-W12-001-C Horizontal – Thru Hole 0.6-1.8V, 90A/162W OKDX-T/90-W12-001-C Single-Inline-Package Absolute Maximum Ratings Characteristics Min Typ Max Unit TP1 Operating temperature (see Thermal Consideration section) -40 150 °C T Storage temperature (Ambient) -40 125 °C S Input voltage (See Operating Information Section for input V -0.3 16 V I and output voltage relations) Signal I/O voltage CTRL, SA, SALERT, SCL, SDA, VSET, SYNC, PG, GCB, FAULT -0.3 6 V Ground voltage -S, PREF, GND -0.3 0.3 V differential Analog pin voltage VO, +S, VTRK -0.3 6.5 V General and Safety Conditions Min Typ Max Unit Safety Designed for UL/IEC/EN 60950 1 Calculated MTBF Telcordia SR-332, Issue 2 Method 1 14.95 Mhrs Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the Electrical Specification section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Configuration File This product is designed with a digital control circuit. The control circuit uses a configuration file which determines the functionality and performance of the product. The Electrical Specification table shows parameter values of functionality and performance with the Standard configuration, unless otherwise specified. The Standard configuration is designed to fit most application needs. Changes in Standard configuration might be required to optimize performance in specific application. Note that current sharing operation requires changed configuration. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 2 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Product Electrical Specifications OKDY-T/90-W12-xxx-C, OKDH-T/90-W12-xxx-C and OKDX-T/90-W12-xxx-C T = -30 to +95 °C, V = 7.5 to 14 V, unless otherwise specified under Conditions. P1 I Typical values given at: T = +25 °C, V = 12.0 V, max I , unless otherwise specified under Conditions. P1 I O V defined by pin strap. Standard configuration. O Tested with external CIN = 1000 μF/12 mΩ + 24 x 10 μF, COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF. See Operating Information section for design of input and output filters for a specific application. In the test set-up sense lines are connected directly to output pins on a converter and all the output voltage measurements are made on output pins. Characteristics Conditions Min Typ Max Unit Input voltage 7.5 14 V VI Input voltage slew rate Monotonic 6 V/ms Output voltage without pin-strap 1.2 V Output voltage adjustment range 0.6 1.8 V Output voltage adjustment including PMBus 0.54 1.98 V margining Output voltage set-point resolution ±0.025 % VO Output voltage accuracy, Note 8 Including line, load, temp -1 1 % VO Internal resistance +S/-S to VOUT/GND 47 Ω +S bias current -100 20 100 μA VO -S bias current 20 μA VO = 0.6 V 2 Line regulation IO = max IO VO = 1.0 V 2 mV VO = 1.8 V 2 VO = 0.6 V 2 Load regulation IO = 0 - 100% VO = 1.0 V 2 mV V = 1.8 V 2 O V = 0.6 V 2.5 O Output ripple & noise V V = 1.0 V 3.5 mVp-p Oac O (up to 20 MHz) V = 1.8 V 5.0 O IO Output current 0 90 A Ilim Current limit threshold 100 114 125 A RMS, hiccup mode, Isc Short circuit current 12 A V = 1.0 V, 0.4 mΩ short O V = 0.6 V 87.6 O 50% of max I V = 1.0 V 91.4 % O O V = 1.8 V 94.3 O η Efficiency V = 0.6 V 83.7 O I = max I V = 1.0 V 88.7 % O O O V = 1.8 V 92.5 O V = 0.6 V 10.5 O P Power dissipation at max I V = 1.0 V 11.5 W d O O V = 1.8 V 13.1 O VO = 0.6 V 1.29 Pli Input idling power IO = 0 VO = 1.0 V 1.35 W VO = 1.8 V 1.82 PCTRL Input standby power Turned off with CTRL-pin 0.44 W CI Internal input capacitance VI = 0 V 257 μF CO Internal output capacitance VO = 0 V 700 μF www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 3 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Common Electrical Specifications This section includes parameter specifications common to all product versions within the product series. Typically these are parameters defined by the digital controller of the products. In the table below PMBus commands for configurable parameters are written in capital letters. T = -30 to +95 °C, V = 7.5 to 14 V, unless otherwise specified under Conditions. P1 I Typical values given at: TP1 = +25 °C, VI = 12.0 V, max IO, unless otherwise specified under Conditions. VO defined by pin-strap. Standard configuration. Characteristics Conditions Min Typ Max Unit Switching Frequency 320 kHz PMBus configurable Switching Frequency Range, Note 1 200 640 kHz FREQUENCY_SWITCH fSW = 1/TSW Switching Frequency Set-point Accuracy -5 5 % External Sync Pulse Width 150 ns Input Clock Frequency Drift Tolerance External sync -10 10 % TINIT Initialization Time From VI > ~2.7 V to ready to be enabled 67 ms Enable by input voltage TINIT + TONdel Output voltage T ONdel_tot Total On Delay Time Enable by CTRL pin TONdel Turn on delay duration 5 ms Output voltage Range PMBus configurable TONdel 3 250 ms On Delay Time TON_DELAY Accuracy (actual delay vs set value) -0/+2 ms Turn off delay duration, Note 2 0 ms Output voltage Range PMBus configurable TOFFdel Off Delay Time 4 250 ms TOFF_DELAY Accuracy (actual delay vs set value), Note 3 -0/+2 ms Turn on ramp duration 5 ms Disabled in standard configuration. Turn off immediately Turn off ramp duration upon expiration of Turn off delay. Output voltage TONrise / On/Off Ramp duration range TOFFfall Ramp Time PMBus configurable 0 100 ms (0-100%-0 of V ) O TON_RISE/TOFF_FALL Ramp time accuracy for standalone operation (actual ±250 μs ramp time vs set value) Characteristics Conditions Min Typ Max Unit Rising 90 % VO PG threshold Falling 85 % VO PMBus configurable PG thresholds range POWER_GOOD_ON 0 100 % VO VOUT_UV_FAULT_LIMIT Power Good, PG From V reaching target to PG O PG delay 2 ms assertion PMBus configurable PG delay range 0 5000 ms POWER_GOOD_DELAY IUVP threshold 6.4 V PMBus configurable IUVP threshold range 6.4 14 V VIN_UV_FAULT_LIMIT IUVP hysteresis 0.5 V Input Under Voltage Protection, PMBus configurable IUVP hysteresis range 0 7.6 V IUVP VIN_UV_WARN_LIMIT Set point accuracy ±280 mV IUVP response delay 100 μs Fault response VIN_UV_FAULT_RESPONSE Shutdown, automatic restart, 280 ms. Note 4 www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 4 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Characteristics Conditions Min Typ Max Unit IOVP threshold 16 V PMBus configurable IOVP threshold range 6.9 16 V VIN_OV_FAULT_LIMIT IOVP hysteresis 1 V Input Over Voltage Protection, PMBus configurable IOVP hysteresis range 0 9.1 V IOVP VIN_OV_WARN_LIMIT Set point accuracy ±280 mV IOVP response delay 100 μs Fault response VIN_OV_FAULT_RESPONSE Shutdown, automatic restart, 280 ms. Note 4 UVP threshold 85 % V O PMBus configurable UVP threshold range 0 100 % VO VOUT_UV_FAULT_LIMIT Output Voltage OVP threshold 115 % V O Over/Under Voltage PMBus configurable Protection, OVP threshold range 100 115 % VO VOUT_OV_FAULT_LIMIT OVP/UVP UVP/OVP response time 10 μs VOUT_UV_FAULT_RESPONSE Fault response Shutdown, automatic restart, 280 ms. Note 4 VOUT_OV_FAULT_RESPONSE OCP threshold Set value per phase 57 A Over Current Protection, PMBus configurable OCP threshold range 0-57 A IOUT_AVG_OC_FAULT_LIMIT OCP Note 5 Protection delay See Note 6 5 TSW MFR_IOUT_OC_FAULT_RESPONSE Fault response Shutdown, automatic restart, 280 ms. Note 4 OTP threshold 125 °C Over Temperature PMBus configurable Protection, OTP threshold range -40 +125 °C OT_FAULT_LIMIT OTP Position P3 OTP hysteresis PMBus configurable 15 °C Note 7 Fault response OT_FAULT_RESPONSE Shutdown, automatic restart, 280 ms. Note 4 OTP Threshold 150 °C Over Temperature PMBus configurable Protection, OTP Threshold range -40 +150 °C MFR_VMON_OV_FAULT_LIMIT OTP Position P1 / P2 OTP Hysteresis 25 °C Note 7 Fault response VMON_OV_FAULT_RESPONSE Shutdown, automatic restart, 280 ms. Note 4 www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 5 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Characteristics Conditions Min Typ Max Unit Input voltage ±280 mV READ_VIN Output voltage ±1 % VO READ_VOUT TP1 = 25 °C, VO = 1.0 V ±1 A Output current Monitoring Accuracy READ_IOUT ±3.5 A TP1 = 0 - 95 °C, VO = 1.0 V Duty cycle No tolerance, Read value is the actual value applied by READ_DUTY_CYCLE PWM controller. Temperature Position P3, T = 0 - 95 °C -10 5 °C P3 READ_TEMPERATURE_1 Tracking Input Bias Current VTRK = 5 V 70 200 μA Tracking Input Voltage Range VTRK pin 0 5 V Tracking Rise-Time VTRK pin 1 V/ms Tracking Accuracy Regulation 100% tracking -2 2 % VO Current difference between products in a current sharing Steady state operation Max 2 x READ_IOUT monitoring accuracy group Supported number of products in a current sharing group 4 VOL Logic output low signal level 0.5 V SCL, SDA, SYNC, GCB, SALERT, PG Sink / source current = 2 mA VOH Logic output high signal level 2.25 V IOL Logic output low sink current 2 mA IOH Logic output high source current 2 mA V Logic input low threshold 0.8 V IL SCL, SDA, CTRL, SYNC, GCB V Logic input high threshold 2 V IH I Logic leakage current SCL, SDA, SYNC, SALERT, PG -100 100 μA I_LEAK C Logic pin input capacitance SCL, SDA, CTRL, SYNC, GCB 12 pF I_PIN SCL, SDA, SALERT No internal pull-up R Logic pin internal pull-up resistance CTRL to +5V 10 kΩ I_PU GCB to +5V 47 kΩ f Supported SMBus Operating frequency 100 400 kHz SMB STOP bit to START bit T SMBus Bus free time 1.3 μs BUF See section SMBus – Timing tset SMBus SDA setup time from SCL See section SMBus – Timing 100 ns thold SMBus SDA hold time from SCL See section SMBus – Timing 300 ns SMBus START/STOP condition setup/hold time 600 ns from SCL Tlow SCL low period 1.3 μs T SCL high period 0.6 μs high Note 1. There are configuration changes to consider when changing the switching frequency, see section Switching Frequency. Note 2. A default value of 0 ms forces the device to Immediate Off behavior with TOFF_FALL ramp-down setting being ignored. Note 3. The specified accuracy applies for off delay times larger than 4 ms. When setting 0 ms the actual delay will be 0 ms. Note 4. Automatic restart ~280 ms after fault if the fault is no longer present. Continuous restart attempts if the fault reappear after restart. See Operating Information for other fault response options. Note 5. The set OCP limit applies per phase. The total OCP limit will be twice the set value. Note that higher OCP threshold than specified may result in damage of the module at OC fault conditions. Note 6. T is the switching period. SW Note 7. See section Over Temperature Protection (OTP). Note 8. For V < 1.0 V accuracy is +/-10 mV. For further exceptions see section Output Voltage Adjust using PMBus. O www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 6 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Typical Output Characteristics, V = 0.6 V O Standard configuration unless otherwise specified, T = +25 °C P1 Efficiency Power Dissipation [%] [W] 100 15 95 12 V V I I 90 7.5 V 9 7.5 V 85 9.6 V 9.6 V 6 12 V 80 12 V 14 V 3 14 V 75 0 70 0 10 20 30 40 50 60 70 80 90 0 10 20 30 40 50 60 70 80 90 [A] [A] Efficiency vs. load current and input voltage. Dissipated power vs. load current and input voltage. Output Current Derating for SIP version Output Current Derating for Horizontal versions [A] [A] 100 100 90 90 80 80 3.0 m/s 3.0 m/s 70 70 2.0 m/s 2.0 m/s 60 60 1.0 m/s 1.0 m/s 50 50 40 40 0.5 m/s 0.5 m/s 30 30 Nat. Conv. Nat. Conv. 20 20 10 10 0 0 0 20 40 60 80 100 120 0 20 40 60 80 100 120 [°C] [°C] Available load current vs. ambient air temperature and airflow at Available load current vs. ambient air temperature and airflow at V = 12 V. See section Thermal Consideration. V = 12 V. See section Thermal Consideration. I I Output Ripple and Noise Transient Response Fundamental output voltage ripple at V = 12 V, I = max I , Output voltage response to load current step change (22.5–67.5–22.5 A) at I O O C = 10 x 470 μF/5 mΩ + 10 x 100 μF. V = 12 V, C = 10 x 470 μF/5 mΩ + 10 x 100 μF, di/dt = 2 A/µs, OUT I OUT Scale: 5 mV/div, 2 µs/div, 20 MHz bandwidth. ASCR Gain = 550 and ASCR Residual = 90. See section Output Ripple and Noise. Scale from top: 50 mV/div, 20 A/div, 100 µs/div. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 7 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Typical Output Characteristics, V = 1.0 V O Standard configuration unless otherwise specified, TP1 = +25 °C Efficiency Power Dissipation [%] [W] 100 15 95 12 V V I I 90 7.5 V 9 7.5 V 85 9.6 V 9.6 V 6 12 V 80 12 V 14 V 3 14 V 75 70 0 0 10 20 30 40 50 60 70 80 90 0 10 20 30 40 50 60 70 80 90 [A] [A] Efficiency vs. load current and input voltage. Dissipated power vs. load current and input voltage. Output Current Derating for SIP version Output Current Derating for Horizontal versions [A] [A] 100 100 90 90 80 80 3.0 m/s 3.0 m/s 70 70 2.0 m/s 2.0 m/s 60 60 1.0 m/s 1.0 m/s 50 50 40 40 0.5 m/s 0.5 m/s 30 30 Nat. Conv. Nat. Conv. 20 20 10 10 0 0 0 20 40 60 80 100 120 0 20 40 60 80 100 120 [°C] [°C] Available load current vs. ambient air temperature and airflow at Available load current vs. ambient air temperature and airflow at V = 12 V. See section Thermal Consideration. V = 12 V. See section Thermal Consideration. I I Output Ripple and Noise Transient Response Fundamental output voltage ripple at V = 12 V, I = max I , Output voltage response to load current step change (22.5–67.5–22.5 A) at I O O C = 10 x 470 μF/5 mΩ + 10 x 100 μF. V = 12 V, C = 10 x 470 μF/5 mΩ + 10 x 100 μF, di/dt = 2 A/µs, OUT I OUT Scale: 5 mV/div, 2 µs/div, 20 MHz bandwidth. ASCR Gain = 400 and ASCR Residual = 90. See section Output Ripple and Noise. Scale from top: 50 mV/div, 20 A/div, 100 µs/div. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 8 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Typical Output Characteristics, V = 1.8 V O Standard configuration unless otherwise specified, TP1 = +25 °C Efficiency Power Dissipation [%] [W] 100 15 95 12 V V I I 90 7.5 V 9 7.5 V 85 9.6 V 9.6 V 6 12 V 80 12 V 14 V 3 14 V 75 70 0 0 10 20 30 40 50 60 70 80 90 0 10 20 30 40 50 60 70 80 90 [A] [A] Efficiency vs. load current and input voltage. Dissipated power vs. load current and input voltage. Output Current Derating for SIP version Output Current Derating for Horizontal versions [A] [A] 100 100 90 90 80 80 3.0 m/s 3.0 m/s 70 70 2.0 m/s 2.0 m/s 60 60 1.0 m/s 1.0 m/s 50 50 40 40 0.5 m/s 0.5 m/s 30 30 Nat. Conv. Nat. Conv. 20 20 10 10 0 0 0 20 40 60 80 100 120 0 20 40 60 80 100 120 [°C] [°C] Available load current vs. ambient air temperature and airflow at Available load current vs. ambient air temperature and airflow at V = 12 V. See section Thermal Consideration. V = 12 V. See section Thermal Consideration. I I Output Ripple and Noise Transient Response Fundamental output voltage ripple at V = 12 V, I = max I , Output voltage response to load current step change (22.5–67.5–22.5 A) at I O O C = 10 x 470 μF/5 mΩ + 10 x 100 μF. V = 12 V, C = 10 x 470 μF/5 mΩ + 10 x 100 μF, di/dt = 2 A/µs, OUT I OUT Scale: 5 mV/div, 2 µs/div, 20 MHz bandwidth. ASCR Gain = 350 and ASCR Residual = 90. See section Output Ripple and Noise. Scale from top: 50 mV/div, 20 A/div, 100 µs/div. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 9 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Typical On/Off Characteristics Standard configuration, T = +25 °C, V = 1.0 V P1 O Enable by input voltage – PG Open-Drain (default) Disable by input voltage – PG Open-Drain (default) V I V I V V O O PG PG Output enabled by applying V . V = 12 V, I = max I . Output disabled by removing V . V = 12 V, I = max I . I I O O I I O O TON_DELAY = TON_RISE = 5 ms, POWER_GOOD_DELAY = 2 ms. Scale from top: 10, 0.5, 2 V/div, 1 ms/div. USER_CONFIG = 0x1480 (default). PG pulled up to external voltage. Note: PG being high before Vin applied can be avoided by pulling up PG to Vout. Scale from top: 10, 0.5, 2 V/div, 20 ms/div. Enable by input voltage – PG Push-Pull Disable by input voltage – PG Push-Pull V I V O PG Output enabled by applying V . V = 12 V, I = max I . Output disabled by removing V . V = 12 V, I = max I . I I O O I I O O TON_DELAY = TON_RISE = 5 ms, POWER_GOOD_DELAY = 2 ms. Scale from top: 10, 0.5, 2 V/div, 1 ms/div. USER_CONFIG = 0x1484 (PG push-pull). Scale from top: 10, 0.5, 2 V/div, 20 ms/div. Enable by CTRL pin Disable by CTRL pin CTRL CTRL VO V O PG PG Output enabled by CTRL pin. V = 12 V, I = max I . Output disabled by CTRL pin. V = 12 V, I = max I I O O I O O. TON_DELAY = TON_RISE = 5 ms, POWER_GOOD_DELAY = 2 ms. Scale from top: 5, 0.5, 2 V/div, 1 ms/div. Scale from top: 5, 0.5, 2 V/div, 10 ms/div. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 10 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Typical Charactersitics Standard configuration unless otherwise specified, TP1=+25 °C Efficiency vs. Output Current and Power Dissipation vs. Output Current and Switching Frequency Switching Frequency [%] [W] 95 15 200 kHz 200 kHz 90 12 V V I I 320 kHz 320 kHz 85 9 480 kHz 480 kHz 80 6 640 kHz 640 kHz 75 3 70 0 0 10 20 30 40 50 60 70 80 90 0 10 20 30 40 50 60 70 80 90 [A] [A] Efficiency vs. load current and switching frequency at Dissipated power vs. load current and switching frequency at V = 12 V, V = 1.0 V, C = 10 x 470 μF/5 mΩ + 10 x 100 μF. V = 12 V, V = 1.0 V, C = 10 x 470 μF/5 mΩ + 10 x 100 μF. I O O I O O Frequency changed by PMBus command FREQUENCY_SWITCH. Frequency changed by PMBus command FREQUENCY_SWITCH. Load Transient vs. ASCR Gain and Output Ripple vs. Switching Frequency External Output Capacitance [mV ] [mV] pk-pk 8 100 80 10x100 6 V O μF + 10x470 60 0.6 V μF/5 mΩ 4 10x100 40 1.0 V μF + 4x470 2 μF/5 mΩ 1.8 V 20 0 0 200 300 400 500 600 150 200 250 300 350 400 450 500 [kHz] Output voltage ripple V vs. switching frequency at Load transient peak voltage deviation vs. ASCR gain and external capacitance. pk-pk V = 12 V, I = max I , C = 10 x 470 μF/5 mΩ + 10 x 100 μF. Step (22.5–67.5–22.5 A). I O O O Frequency changed by PMBus command FREQUENCY_SWITCH. V = 12 V, V = 1.0 V, f = 320 kHz, ASCR residual =90, di/dt = 2 A/µs. I O sw ASCR gain changed by PMBus command ASCR_CONFIG. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 11 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series EMC Specification Output Ripple and Noise Conducted EMI is measured according to the test set-up below. The typical Output ripple and noise are measured according to figure below. A 50 mm fundamental switching frequency is 320 kHz. conductor works as a small inductor forming together with the two capacitances a damped filter. Conducted EMI Input terminal value (typical for standard configuration). VI = 12 V, V = 1.0 V, I = 90 A. O O 50 mm conductor Vout Tantalum Ceramic Capacitor Capacitor +S c o 10 µF 0.1 µF −S GND 50 mm conductor BNC-contact to oscilloscope Output ripple and noise test set-up. The digital compensation of the product is designed to automatically provide stability, accurate line and load regulation and good transient performance for a wide range of operating conditions (switching frequency, input voltage, output voltage, output capacitance). Inherent from the implementation and normal to the product there will be some low frequency ripple at the output, in addition to the fundamental switching frequency output ripple. The total output ripple and noise is maintained at a low level. EMI without filter. V = 12 V, V = 1.0 V, I = 90 A, C = 10 x 470 μF/5 mΩ + 10 x 100 μF, I O O OUT 5 mV/div, 50 μs/div Example of low frequency ripple at the output. Test set-up conducted emission, power lead. 2 DUT = Product mounted on a 182 cm test board with the external capacitances CIN = 1000 μF/12 mΩ + 24 x 10 μF and COUT = 10 x 470 μF/5 mΩ + 10 x 100 μF. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 12 of 71 Load OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series PMBus Interface RSA [kΩ] Address RSA [kΩ] Address Power Management Overview 0 (short) 0x26 42.2 0x28 This product incorporates a wide range of configurable power management 10 0x19 46.4 0x29 features that are simple to implement with a minimum of external 11 0x1A 51.1 0x2A components. Additionally, the product includes protection features that 12.1 0x1B 56.2 0x2B continuously safeguard the load from damage due to unexpected system faults. 13.3 0x1C 61.9 0x2C 14.7 0x1D 68.1 0x2D The product’s standard configuration is suitable for a wide range of operation in terms of input voltage, output voltage, and load. The configuration is stored 16.2 0x1E 75 0x2E in an internal Non-Volatile Memory (NVM). All power management functions 17.8 0x1F 82.5 0x2F can be reconfigured using the PMBus interface. 19.6 0x20 90.9 0x30 Throughout this document, different PMBus commands are referenced. A 21.5 0x21 100 0x31 detailed description of each command is provided in the appendix at the end of 23.7 0x22 110 0x32 this specification. 26.1 0x23 121 0x33 28.7 0x24 133 0x34 SMBus Interface 31.6 0x25 147 0x35 2 The product can be used with any standard two-wire I C or SMBus host 34.8 0x26 162 0x36 device. See Electrical Specification for allowed clock frequency range. In 38.3 0x27 178 0x37 addition, the product is compatible with PMBus version 1.2 and includes an SALERT line to help mitigate limitations related to continuous fault monitoring. The PMBus signals SCL, SDA and SALERT require passive pull-up resistors as Infinite (open) 0x28 stated in the SMBus Specification. Pull-up resistors values should be selected to guarantee the rise time according to equation below: Reserved Addresses τ = R C ≤ 1μs P p Addresses listed in the table below are reserved or assigned according to the SMBus specification and may not be usable. Refer to the SMBus specification where R is the pull-up resistor value and C is the bus loading. The maximum for further information. p p allowed bus load is 400 pF. The pull-up resistor should be tied to an external supply voltage in range from 2.5 to 5.5 V, which should be present prior to or Address Comment during power-up. If the proper power supply is not available, voltage dividers may be applied. Note that in this case, the resistance in the equation above 0x00 General Call Address / START byte corresponds to parallel connection of the resistors forming the voltage divider. 0x01 CBUS address 0x02 Address reserved for different bus format PMBus Addressing 0x03 - 0x07 Reserved for future use The PMBus address is configured with a resistor connected between the SA pin and the PREF pin, as shown in the Typical Application Circuit. 0x08 SMBus Host Recommended resistor values are shown in the table below. 1% tolerance 0x09 - 0x0B Assigned for Smart Battery resistors are required. 0x0C SMBus Alert Response Address 0x28 Reserved for ACCESS.bus host Reserved by previous versions of the SMBus 0x2C - 0x2D specification 0x37 Reserved for ACCESS.bus default address Reserved by previous versions of the SMBus 0x40 - 0x44 specification 0x48 - 0x4B Unrestricted addresses 0x61 SMBus Device Default Address 0x78 - 0x7B 10-bit slave addressing 0x7C - 0x7F Reserved for future use www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 13 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Monitoring via PMBus Snapshot Parameter Capture It is possible to continuously monitor a wide variety of parameters through the This product offers a special feature that enables the user to capture PMBus interface. These include, but are not limited to, the parameters listed in parametric data during normal operation by a single PMBus command. The the table below. following parameters are stored: Parameter PMBus Command • Input voltage Input voltage READ_VIN • Output voltage Output voltage READ_VOUT • Output current • Controller temperature Total output current READ_IOUT • Switching frequency READ_IOUT0 Output current of each phase • Duty cycle READ_IOUT1 • Status and fault information Controller temperature (T ) READ_TEMPERATURE_1 P3 When a fault occurs the Snapshot functionality will automatically store this Switching frequency READ_FREQUENCY parametric data to NVM. The data can then later be read back using the Duty cycle READ_DUTY_CYCLE SNAPSHOT command to provide valuable information for analysis. It is possible Highest temperature of power to select which faults will trigger a store to NVM by the PMBus command MFR_READ_VMON * switches (TP1, TP2) SNAPSHOT_FAULT_MASK. * Reports a voltage level corresponding to the temperature. See command details in the end of this specification for formula to use. 2 PMBus/I C Timing Monitoring Faults Fault conditions can be monitored using the SALERT pin, which will be V IH SCL V asserted low when any number of pre-configured fault or warning conditions IL occur. The SALERT pin will be held low until faults and/or warnings are cleared by the CLEAR_FAULTS command, or until the output voltage has been re- enabled. V IH SDA V IL It is possible to mask which fault conditions should not assert the SALERT pin by the command MFR_SMBALERT_MASK. t t set hold In response to the SALERT signal, the user may read a number of status commands to find out what fault or warning condition occurred, see table Setup and hold times timing diagram. below. The setup time, tset, is the time data, SDA, must be stable before the rising Fault & Warning Status PMBus Command edge of the clock signal, SCL. The hold time t , is the time data, SDA, must hold STATUS_WORD be stable after the falling edge of the clock signal, SCL. If these times are Overview, Power Good STATUS_BYTE violated incorrect data may be captured or meta-stability may occur and the bus communication may fail. All standard SMBus protocols must be followed, Output voltage level STATUS_VOUT including clock stretching. Refer to the SMBus specification, for SMBus Output current level STATUS_IOUT electrical and timing requirements. Input voltage level STATUS_INPUT This product supports the BUSY flag in the status commands to indicate Temperature level STATUS_TEMPERATURE product being too busy for SMBus response. A bus-free time delay according to this specification must occur between every SMBus transmission (between PMBus communication STATUS_CML every stop & start condition). Miscellaneous STATUS_MFR_SPECIFIC The product supports PEC (Packet Error Checking) according to the SMBus specification. When sending subsequent commands to the same module, it is recommended to insert additional delays according to the table below. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 14 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Command Protection Required delay before The user may write-protect specific PMBus commands in the User NVM by After sending PMBus Command additional command using the command UNPROTECT. STORE_USER_ALL 100 ms Initialization Procedure STORE_DEFAULT_ALL The product follows an internal initialization procedure after power is applied RESTORE_USER_ALL to the VIN pins: 100 ms RESTORE_DEFAULT_ALL 1. Self test and memory check. 10 ms VOUT_MAX 2. The address pin-strap resistors are measured and the associated PMBus 2 ms after reading address is defined. Any other command 10 ms after writing 3. The output voltage pin-strap resistor is measured and the associated output voltage level will be loaded to operational RAM of PMBus command Non-Volatile Memory (NVM) VOUT_COMMAND. The product incorporates two Non-Volatile Memory areas for storage of the 4. Factory default values stored in default NVM memory are loaded to PMBus command values; the Default NVM and the User NVM. operational RAM. This overwrites any previously loaded values. The Default NVM is pre-loaded with factory default values. The Default NVM is write-protected and can be used to restore the factory default values through 5. Values stored in the User NVM are loaded into operational RAM memory. the command RESTORE_DEFAULT_ALL. This overwrites any previously loaded values (e.g. VOUT_COMMAND by The User NVM is pre-loaded with factory default values. The User NVM is pin-strap). writable and open for customization. The values in NVM are loaded during initialization according to section Initialization Procedure, whereafter 6. Check for external clock signal at the SYNC pin and lock internal clock to commands can be changed through the PMBus Interface. The the external clock if used. STORE_USER_ALL command will store the changed parameters to the User Once this procedure is completed and the Initialization Time has passed (see NVM. Electrical Specification), the output voltage is ready to be enabled using the CTRL pin. The product is also ready to accept commands via the PMBus interface, which in case of writes will overwrite any values loaded during the initialization procedure. INITIALIZATION Pin-strap resistors INITIALIZATION Default NVM Factory default RESTORE_DEFAULT_ALL Write-protected RAM INITIALIZATION User NVM Factory default STORE_USER_ALL Customizable RESTORE_USER_ALL Illustration Initialization time. WRITE PMBus interface READ Illustration of memory areas of the product. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 15 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Operating Information Input Voltage The input voltage range 7.5 - 14 V makes the product easy to use in intermediate bus applications when powered by a non-regulated bus converter or a regulated bus converter. Input Under Voltage Protection (IUVP) The product monitors the input voltage and will turn-on and turn-off at configured thresholds (see Electrical Specification). The turn-on input voltage threshold is set higher than the corresponding turn-off threshold. Hence, there is a hysteresis between turn-on and turn-off input voltage levels. Once the input voltage falls below the turn-off threshold, the device can respond in several ways as follows: 1. Immediate and definite shutdown of output voltage until the fault is cleared by PMBus command CLEAR_FAULTS or the output voltage is re- enabled. 2. Immediate shutdown of output voltage while the input voltage is below The input ripple RMS current in a two-phase buck converter can be estimated to the turn-on threshold. Operation resumes automatically and the output is enabled when the input voltage has risen above the turn-on threshold. I = I D(0.5 − D) (valid for D < 0.5) The default response is option 2. The IUVP function can be reconfigured using inputRMS load the PMBus commands VIN_UV_FAULT_LIMIT (turn-off threshold), VIN_UV_WARN_LIMIT (turn-on threshold) and VIN_UV_FAULT_RESPONSE. Where I is the output load current and D is the duty cycle. The maximum load load ripple current becomes I /4. The ripple current is divided into three load For products configured to operate in current sharing mode, response option 1 parts, i.e., currents in the input source, external input capacitor, and internal will always be used, regardless of VIN_UV_FAULT_RESPONSE command input capacitor. How the current is divided depends on the impedance of the settings. input source, ESR and capacitance values in the capacitors. Input Over Voltage Protection (IOVP) For most applications non-tantalum capacitors are preferred due to the robustness of such capacitors to accommodate high inrush currents of The product monitors the input voltage continuously and will respond as systems being powered from very low impedance sources. It is recommended configured when the input voltage rises above the configured threshold level to use a combination of ceramic capacitors and low-ESR electrolytic/polymer (see Electrical Specification). Refer to section “Input Under Voltage Protection” bulk capacitors. The low ESR of ceramic capacitors effectively limits the input for functionality, response configuration options and default setting. ripple voltage level, while the bulk capacitance minimizes deviations in the The IOVP function can be reconfigured using the PMBus commands VIN_OV_FAULT_LIMIT (turn-off threshold), VIN_OV_WARN_LIMIT (turn-on input voltage at large load transients. threshold) and VIN_OV_FAULT_RESPONSE. If several products are connected in a phase spreading setup the amount of input ripple current, and capacitance per product, can be reduced. Input and Output Impedance Ceramic input capacitors must be placed close to the input pins of a converter The impedance of both the input source and the load will interact with the and with low impedance connections to the VIN and GND pins in order to be impedance of the product. It is important that the input source has low effective. characteristic impedance. If the input voltage source contains significant inductance, the addition of a capacitor with low ESR at the input of the product External Output Capacitors will ensure stable operation. The output capacitor requirement depends on two considerations; output ripple voltage and load transient response. To achieve low ripple voltage, the output External Input Capacitors capacitor bank must have a low ESR value, which is achieved with ceramic The product is a two-phase converter which gives lower input ripple than a output capacitors. A low ESR value is critical also for a small output voltage single phase design, see picture below. Thus, ripple-current-rating deviation during load transients. Designs with smaller load transients can use requirements for the input capacitors are lower relatively to a single phase fewer capacitors and designs with more dynamic load content will require converter. more load capacitors to minimize output voltage deviation. Improved transient response can also be achieved by adjusting the settings of the control loop of the product. Adding output capacitance decreases loop band-width. It is recommended to place low ESR ceramic and low ESR electrolytic/polymer capacitors as close to the load as possible, using several capacitors in parallel to lower the effective ESR. It is important to use low resistance and low inductance PCB layouts in order for capacitance to be effective. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 16 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Dynamic Loop Compensation (DLC) The typical design of regulated power converters includes a control function [µs] with a feedback loop that can be closed using either analog or digital 130 circuits. The feedback loop is required to provide a stable output voltage, but should be optimized for the output filter to maintain output voltage regulation during transient conditions such as sudden changes in output current and/or 110 10x100 input voltage. Digitally controlled converters allow one to optimize loop μF + parameters without the need to change components on the board, however, 10x470 90 μF/5 mΩ optimization can still be challenging because the key parameters of the output filter include parasitic impedances in the PCB and the often distributed filter 10x100 70 components themselves. μF + 4x470 μF/5 mΩ Dynamic Loop Compensation has been developed to solve the problem of 50 compensation for a converter with a difficult to define output filter. This task is achieved by utilization of algorithms that can identify an arbitrary output filter 30 based on accurate measurements of the output voltage in response to a very 50 60 70 80 90 100 110 small excitation signal initiated by the algorithm, or occurring due to the changes in operating conditions, and automatically adjust feedback loop Load step 22.5–67.5–22.5 A, di/dt = 2 A/μs. parameters to match the output filter. VI = 12 V, VO = 1.0 V, fsw = 320 kHz, Gain factor = 300. Residual factor changed by PMBus command ASCR_CONFIG. Control Loop Recovery time vs.control loop residual setting and output capacitance. The products use a fully digital control loop that achieves precise control of the entire power conversion process, resulting in a very flexible device that is also By default the product is configured with a moderate gain factor to provide a very easy to use. trade-off between load transient performance and output ripple for a wide A non-linear charge-mode control algorithm is implemented that responds to range of operating conditions. For a specific application the gain factor can be output current changes within a single PWM switching cycle, achieving a increased to improve load transient response. smaller total output voltage variation with less output capacitance than traditional PWM controllers, thus saving cost and board space. Remote Sense Control may be set more or less aggressive by adjusting a gain factor, set by the PMBus command ASCR_CONFIG. Increasing the gain factor, i.e the control The product has remote sense to compensate the voltage drops between the effort, will reduce the voltage deviation at load transients, at the expense of output and the point of load. The sense traces should be laid out as a somewhat increased ripple on the output. Below graph exemplifies the effect differential pair and preferably be shielded by the PCB ground layer to reduce of the gain factor on the voltage deviation during a load transient. The typical noise susceptibility. If the remote sense is not used, +S must be connected to range of the gain factor is 200 - 600. VOUT and −S must be connected to GND. In cases where the external output filter includes an inductor (forming a pi [mV] filter) according to the picture below, the LEXT/CEXT resonant frequency places 100 an upper limit on the controller loop bandwidth. If the resonance frequency is high the sense lines can be connected after the filter (as shown in the picture) – if the resonant frequency is low and the DC drop from LEXT is acceptable, 80 10x100 sensing before the filter may be better. μF + 10x470 60 μF/5 mΩ Vout 10x100 L EXT 40 μF + C C O EXT 4x470 μF/5 mΩ 20 GND 0 -S 150 200 250 300 350 400 450 500 +S External output filter with inductor (pi filter). Load step 22.5–67.5–22.5 A, di/dt = 2 A/μs. VI = 12 V, VO = 1.0 V, fsw = 320 kHz, Residual factor = 90. Gain factor changed by PMBus command ASCR_CONFIG. Enabling Output Voltage Voltage deviation vs. control loop gain setting and output capacitance. The following options are available to enable and disable this device: 1. Output voltage is enabled through the CTRL pin. The user may also adjust the residual factor, set by the ASCR_CONFIG command, to improve the recovery time after a load transient. The typical 2. Output voltage is enabled using the PMBus command OPERATION. usable range of the residual factor is 70 - 127. A higher value than 127 may damage the device and must not be used. A graph below illustrates the effect of the residual factor on the recovery time after a load transient. Note that also the gain factor will affect the recovery time. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 17 of 71 Load OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series operating range. This functionality can also be used to test of supply voltage The CTRL pin can be used with active high (positive) logic or active low supervisors. Margin limits of the nominal output voltage ±5% are default, but (negative) logic. the margin limits can be reconfigured using the PMBus commands VOUT_MARGIN_LOW and VOUT_MARGIN_HIGH. Margining is activated by the The CTRL pin polarity can be reconfigured using the PMBus command command OPERATION and can be used regardless of the output voltage being ON_OFF_CONFIG. enabled by the CTRL pin or by the PMBus. The CTRL pin has an internal 10 kΩ pull-up resistor to 5 V. The external device Output Voltage Trim must have a sufficient sink current ability to be able pull CTRL pin voltage down below logic low threshold The actual output voltage can be trimmed to optimize performance of a level (see Electrical Characteristics). When the CTRL pin is left open, the specific load by setting a non-zero value for PMBus command VOUT_TRIM. voltage on the CTRL pin is pulled up to 5 V. The value of VOUT_TRIM is summed with the nominal output voltage set by VOUT_COMMAND, allowing for multiple products to be commanded to a If the device is to be synchronized to an external clock source, the clock common nominal value, but with slight adjustments per load. frequency must be stable prior to enabling the output voltage. Output Voltage Range Limitation Output Voltage Adjust using Pin-strap Resistor The output voltage range that is possible to set by configuration or by the PMBus interface is hardware limited by the pin-strap resistor RSET. The Using an external Pin-strap resistor, RSET, the output voltage can be set to maximum output voltage is set to 115% of the output value defined by RSET. several predefined levels shown in the table below. Only the voltage levels This protects the application circuit from an over voltage due to an accidental specified in the table can be set by R . The resistor should be applied SET PMBus command. between the VSET pin and the PREF pin as shown in the Typical Application The limitation applies to the actual regulated output voltage rather than to the Circuit. Maximum 1% tolerance resistors are required. configured value. Thus, it is possible to write and read back a VOUT_COMMAND value higher than the limit, but the actual output voltage will RSET [kΩ] VOUT [V] RSET [kΩ] VOUT [V] be limited. The output voltage limit can be reconfigured to a lower than 115% of Vout 0 (short) 1.00 26.1 1.10 value by writing the PMBus command VOUT_MAX. 10 0.60 28.7 1.15 11 0.65 31.6 1.20 Output Over Voltage Protection (OVP) 12.1 0.70 34.8 1.25 The product includes over voltage limiting circuitry for protection of the load. The default OVP limit is 15% above the nominal output voltage. The product 13.3 0.75 38.3 1.30 can be configured to respond in different ways to the output voltage exceeding 14.7 0.80 42.2 1.40 the OVP limit: 16.2 0.85 46.4 1.50 1. Immediate and definite shutdown of output voltage until the fault is 17.8 0.90 51.1 1.60 cleared by PMBus command CLEAR_FAULTS or the output voltage is re- enabled. 19.6 0.95 56.2 1.70 21.5 1.00 61.9 1.80 2. Immediate shutdown of output voltage followed by continuous restart attempts of the output voltage with a preset interval (“hiccup” mode). 23.7 1.05 Infinite (open) 1.20 The default response is option 2. The OVP limit and fault response can be reconfigured using the PMBus commands VOUT_OV_FAULT_LIMIT, VOUT_OV_FAULT_RESPONSE and OVUV_CONFIG. RSET also sets the maximum output voltage; see section Output Voltage Range Limitation. The resistor is sensed only during the initialization procedure after For products configured to operate in current sharing mode, response option 1 application of input voltage. Changing the resistor value during normal will always be used, regardless of this command configuration. operation will not change the output voltage. See Ordering Information for output voltage range. Output Under Voltage Protection (UVP) The product includes output under voltage limiting circuitry for protection of Output Voltage Adjust using PMBus the load. The default UVP limit is 15% below the nominal output voltage. Refer to section Output Over Voltage Protection for response configuration options The output voltage set by pin-strap can be overridden up to a certain level (see and default setting. section Output Voltage Range Limitation) by using the PMBus command The UVP limit and fault response can be reconfigured using the PMBus VOUT_COMMAND. See Electrical Specification for adjustment range. commands VOUT_UV_FAULT_LIMIT and VOUT_UV_FAULT_RESPONSE. Voltage Margining Up/Down Power Good Using the PMBus interface it is possible to adjust the output voltage to one of The power good pin (PG) indicates when the product is ready to provide two predefined levels above or below the nominal voltage setting in order to regulated output voltage to the load. During ramp-up and during a fault determine whether the load device is capable of operating outside its specified condition, PG is held low. By default, PG is asserted high after the output has supply voltage range. This provides a convenient method for dynamically ramped to a voltage above 90% of the nominal voltage, and deasserted if the testing the operation of the load circuit outside its typical output voltage falls below 85% of the nominal voltage. These www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 18 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series thresholds may be changed using the PMBus commands POWER_GOOD_ON Eliminating the slow beat frequencies (usually <10 kHz) relaxes the filtering and VOUT_UV_FAULT_LIMIT. requirements. Synchronization can also be utilized for phase spreading, described in section Phase Spreading. The time between when the POWER_GOOD_ON threshold is reached and when the PG pin is actually asserted is set by the PMBus command The products can be synchronized with an external oscillator or one product POWER_GOOD_DELAY. See Electrical Specification for default value and can be configured with the SYNC pin as a SYNC output, working as a source of range. synchronization signal for other products connected to the same synchronization line. The SYNC pin of products being synchronized must be By default the PG pin is configured as an open drain output but it is also configured as SYNC Input. Default configuration is using the internal clock, possible to set the output in push-pull mode by the command USER_CONFIG. independently of signal at the SYNC pin. Synchronization is configured using PMBus command MFR_USER_CONFIG. The PG output is not defined during ramp up of the input voltage due to the initialization of the product. Phase Spreading When multiple products share a common DC input supply, spreading of the Over Current Protection (OCP) switching clock phase between the products can be utilized. This dramatically The product includes robust current limiting circuitry for protection at reduces input capacitance requirements and efficiency losses, since the peak continuous overload. After ramp-up is complete the product can detect an current drawn from the input supply is effectively spread out over the whole output overload/short condition. The following OCP response options are switch period. This requires that the products are synchronized using the SYNC available: pin. 1. Immediate and definite shutdown of output voltage until the fault is The phase offset is measured from the rising edge of the applied external cleared by PMBus command CLEAR_FAULTS or the output voltage is re- clock to the rising edge of the PWM pulse as illustrated below. enabled. 2. Immediate shutdown of output voltage followed by continuous restart attempts of the output voltage with a preset interval (“hiccup” mode). The default response from an over current fault is option 2. Note that delayed shutdown is not supported. The load distribution should be designed for the maximum output short circuit current specified. The OCP limit and response can be reconfigured using the PMBus commands IOUT_AVG_OC_FAULT_LIMIT and MFR_IOUT_OC_FAULT_RESPONSE. For products operated in current sharing mode, response option 1 will always be used, regardless of configuration. Under Current Protection (UCP) Illustration of phase offset. The product includes robust current limiting circuitry for protection at continuous reversed current, due to a synchronous rectifier ability to sink The phase offset is configured using the PMBus command INTERLEAVE and is current. Refer to section Over Current Protection for response configuration defined as: options and default setting. The UCP limit and response can be reconfigured using the PMBus commands IOUT_AVG_UC_FAULT_LIMIT and Interleave _ order MFR_IOUT_UC_FAULT_RESPONSE. Phase _ offset(°) = 360° × Number _ in _ group Switching Frequency Interleave_order is in the range 0-15. Number_in_group is in the range 0-15 The default switching frequency is chosen as the best tradeoff between where a value of 0 means 16. The set resolution for the phase offset is 360° / efficiency and thermal performance, output ripple and load transient 16 = 22.5°. performance. The switching frequency can be re-configured in a certain range using the PMBus command FREQUENCY_SWITCH. Refer to Electrical By default Number_in_group = 0 and Interleave_order = Four LSB’s of set Specification for default switching frequency and range. PMBus address (see section PMBus Addressing). Changing the switching frequency will affect efficiency and power dissipation, load transient response (control loop characteristics) and output ripple. Control loop settings may need to be adjusted. Soft-start and Soft-stop Note that since the product has two phases the effective switching frequency The soft-start and soft-stop control functionality allows the output voltage to will be twice the configured. ramp-up and ramp-down with defined timing with respect to the control of the output. This can be used to control inrush current and manage supply Synchronization sequencing of multiple controllers. Two or more products may be synchronized with an external clock to eliminate beat frequencies reflected back to the input supply rail. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 19 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series The rise time is the time taken for the output to ramp to its target voltage, interface and uses the GCB bus, see section Group Communication Bus. while the fall time is the time taken for the output to ramp down from its regulation voltage to 0 V. The on delay time sets a delay from when the output is enabled until the output voltage starts to ramp up. The off delay time sets a Pre-Bias Startup Capability delay from when the output is disabled until the output voltage starts to ramp Pre-bias startup often occurs in complex digital systems when current from down. another power source is fed back through a dual-supply logic component, such as FPGAs or ASICs. There could also be still charged output capacitors when starting up shortly after turn-off. The product incorporates synchronous rectifiers, but will not sink current during startup, or turn off, or whenever a fault shuts down the product in a pre-bias condition. Illustration of Soft-Start and Soft-Stop. By default soft-stop is disabled and the regulation of output voltage stops immediately when the output is disabled. Soft-stop can be enabled through the PMBus command ON_OFF_CONFIG. The delay and ramp times can be reconfigured using the PMBus commands TON_DELAY, TON_RISE, TOFF_DELAY and TOFF_FALL. Illustration of Pre-Bias Startup. Output Voltage Sequencing A group of products may be configured to power up in a predetermined sequence. This feature is especially useful when powering advanced Voltage Tracking processors, FPGAs, and ASICs that require one supply to reach its operating voltage prior to another. The product integrates a lossless tracking scheme that allows its output to track a voltage that is applied to the VTRK pin with no external components required. During ramp-up, the output voltage follows the VTRK voltage until the preset output voltage level is met. The product offers two modes of tracking as follows: 1. Coincident. This mode configures the product to ramp its output voltage at the same rate as the voltage applied to the VTRK pin. VOUT MASTER SLAVE Illustration of Output Voltage Sequencing. Different types of multi-product sequencing are supported: t 1. Time based sequencing. Configuring the start delay and rise time of each module through the PMBus interface and by connecting the CTRL pin of each Illustration of Coincident Voltage Tracking. product to a common enable signal. 2. Event based sequencing. Routing the PG pin signal of one module to the 2. Ratiometric. In this mode the product ramps its output voltage at a rate CTRL pin of the next module in the sequence. that is a percentage of the voltage applied to the VTRK pin. Ratiometric tracking is achieved by configuring the product for coincident tracking and 3. GCB based sequencing. Power Good triggered sequencing with the adding an external resistive voltage divider. sequence order defined by configuration. Configured through the PMBus www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 20 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series VOUT Parallel Operation (Current Sharing) MASTER Paralleling multiple products can be used to increase the output current capability of a single power rail. By connecting the GCB and SYNC pins of each device and configuring the devices as a current sharing rail, the units will share the current equally, enabling up to 100% utilization of the current SLAVE capability for each device in the current sharing rail. The product uses a low- bandwidth, first-order digital current sharing by aligning the output voltage of the slave devices to deliver the same current as the master device. Artificial droop resistance is added to the output voltage path to control the slope of the t load line curve, calibrating out the physical parasitic mismatches due to power train components and PWB layout. Up to 4 devices can be configured in a Illustration of Ratiometric Voltage Tracking. given current sharing group. By connecting the FAULT pins of all products in a current sharing group together, it is made sure that the internal power stages of all products shut The master device in a tracking group is defined as the device that has the down quickly and simultaneously in response to a fault that occurs in one of highest target output voltage within the group. This master device will control the products. the ramp rate of all tracking devices and is not configured for tracking mode. Note that continuous restarts after a fault (“hiccup mode”) are not supported Any device configured in tracking mode will ignore its soft-start/stop settings for parallel operation. and take on the turn-on/turn-off characteristics of the voltage present at the VTRK pin. Broadcast Control The product can be configured to broadcast output voltage enable or setting of All of the CTRL pins in the tracking group must be connected and driven by a output voltage level over the GCB bus to other devices in the group. If single logic source. Tracking is configured using the PMBus command configured to do so, a device receiving a PMBus OPERATION command or TRACK_CONFIG. VOUT_COMMAND command will broadcast the same command over the GCB bus, and other devices on the GCB bus will respond to the same commands, if configured to do so. Group Communication Bus Broadcast control is configured using the PMBus command GCB_GROUP. The Group Communication Bus, GCB, is used to communicate between products. This dedicated single wire bus provides the communication channel Fault spreading between devices for features such as sequencing, fault spreading and current The product can be configured to broadcast a fault event over the GCB bus to sharing. The GCB solves the PMBus data rate limitation. The GCB pin on all the other devices in the group. When a non-destructive fault occurs and the devices in an application should be connected together. A pull-up resistor is device is configured to shut down on a fault, the device will shut down and required on the common GCB in order to guarantee the rise time as according broadcast the fault event over the GCB bus. The other devices on the GCB bus to equation below: will shut down together if configured to do so, and will attempt to re-start in τ = R C ≤ 1 μ s GCB GCB their prescribed order if configured to do so. Fault spreading is configured using the PMBus command GCB_GROUP or LEGACY_FAULT_GROUP. where R is the pull up resistor value and C is the bus loading. The pull- GCB GCB up resistor should be tied to an external supply voltage in range from 2.5 to 5.5 V, which should be present prior to or during power-up. The GCB is an internal bus, such that it is only connected across the modules and not the PMBus system host. GCB addresses are assigned on a rail level, i.e. modules within the same current sharing group share the same GCB address. Addressing rails across the GCB is done with a 5 bit GCB ID, yielding a theoretical total of 32 rails that can be shared with a single GCB bus. By default the GCB ID is set to the five LSB’s of set PMBus address (see section PMBus Addressing). www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 21 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Thermal Consideration SIP version General AIR FLOW The product is designed to operate in different thermal environments and sufficient cooling must be provided to ensure reliable operation. Cooling is achieved mainly by conduction, from the pins to the host board, and convection, which is dependent on the airflow across the product. Increased P3 P2 P1 airflow enhances the cooling of the product. The Output Current Derating graph found in the Output section for each model provides the available output current vs. ambient air temperature and air velocity at specified V . I The product is tested on a 254 x 254 mm, 35 μm (1 oz), test board mounted vertically in a wind tunnel with a cross-section of 608 x 203 mm. The test Temperature positions and air flow direction. board has 16 layers. Note that the same PCB is used for both Horizontal and SIP versions. Thus, the positions indicated in the pictures apply to both versions. Definition of Product Operating Temperature P1 is typically the hot spot (the position with the highest temperature). On The temperature at positions P1, P2, P3, P4 and P5 should not exceed the the laydown versions only P4 and P5 are accessible when the module is maximum temperatures in the table below. The number of measurement soldered to the application board. However the temperature at P3 and the points may vary with different thermal design and topology. Temperatures highest temperature at P1/P2 can be monitored via the PMBus interface above specified maximum measured at the specified positions are not (see section Monitoring via PMBus). If still only P4 and P5 are used when allowed and may cause permanent damage. temperatures are recorded, the max allowed temperature at P4 and P5 should be lowered to 115 °C. Note that the max values are the absolute maximum rating (non destruction) and that the provided Electrical Specification data is guaranteed up to TP1 = Definition of Reference Temperature TP1 +95 °C. The temperature at position P1 has been used as a reference temperature for the Electrical Specification data provided. Position Description Max Temperature N2, Power switch P1 TP1 = 130 °C Over Temperature Protection (OTP) Reference point, hot spot The products are protected from thermal overload by dual internal over T = 130 °C P2 N3, Power switch P2 temperature shutdown functions: P3 N1, Control circuit TP3 = 125 °C 1. Temperature in controller N1, located in position P3. P4 L1, Power inductor TP4 = 125 °C 2. The highest temperature of power switches N2 and N3, located in T = 125 °C P5 L2, Power inductor P5 positions P1 and P2. These temperatures are continuously monitored and when a temperature rises above the configured fault threshold level the product will respond as Horizontal versions configured. The product can respond in several ways as follows: AIR FLOW 1. Immediate and definite shutdown of output voltage until the fault is cleared by PMBus command CLEAR_FAULTS or the output voltage is re-enabled. 2. Immediate shutdown of output voltage while the temperature is above the warning threshold. Operation resumes automatically and the P5 P4 output is enabled when the temperature has fallen below the warning threshold, i.e. there is a hysteresis defined by the difference between the fault threshold and the warning threshold. Default response is option 2. The default OTP thresholds and hysteresis are specified in Electrical Characteristics. Temperature positions and air flow direction (top view). The OTP limit, hysteresis and response for temperature in position P3 is configured using the PMBus commands OT_FAULT_LIMIT, OT_WARN_LIMIT and OT_FAULT_RESPONSE. The OTP limit, hysteresis and response for highest temperature of positions P1 and P2 are configured using the PMBus commands MFR_VMON_OV_FAULT_LIMIT and VMON_OV_FAULT_RESPONSE. For products operated in current sharing mode, response option 1 will always be used, regardless of configuration. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 22 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series PCB Layout Consideration • The capacitors COUT should in general be placed close to the load. The radiated EMI performance of the product will depend on the PCB layout However typically you would like to place larger ceramic output and ground layer design. If a ground layer is used, it should be connected to capacitors close to the module output in order to handle the output the output of the product and the equipment ground or chassis. ripple current. Low impedance connections must be used, e.g. A ground layer will increase the stray capacitance in the PCB and improve stitched vias around capacitors’ terminals. the high frequency EMC performance. • Care should be taken in the routing of the connections from the Further layout recommendations are listed below. sensed output voltage to the S+ and S– terminals. These sensing connections should be routed as a differential pair, preferably between • The pin strap resistors, RSET, and RSA should be placed as close to the ground planes which are not carrying high currents. The routing product as possible to minimize loops that may pick up noise. Avoid should avoid areas of high electric or magnetic fields. In case of capacitive load on these signals as it may result in false pin strap current sharing (parallel) operation each module must sense at the reading. same points. • Avoid current carrying planes under the pin strap resistors and the • If possible use planes on several layers to carry VI, VO and GND. There PMBus signals. should be a large number of vias close to the VIN, VOUT and GND pads • The capacitors CIN should be placed as close to the input pins as in order to lower input and output impedances and improve heat possible and with low impedance connections, e.g. using stitched vias spreading between the product and the host board. around capacitors’ terminals. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 23 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Internal Circuit Diagram www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 24 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Typical Application Circuit Standalone operation with PMBus communication. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 25 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Typical Application Circuit – Parallel Operation Parallel operation. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 26 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Pin Descriptions – SIP version Pin layout, top view. Pin Descriptions – Horizontal mount versions (TH and SMT) Pin layout, top view (component placement for illustration only). www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 27 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Input/Output Connections - Pinout and Function Pin Designation Type Function 1A, 1B, 1C, 1D VIN Power Input Voltage 2A, 2B, 2C, 2D GND Power Power Ground 3A, 3B, 3C, 3D VOUT Power Output Voltage 4A +S I Positive sense. Connect to output voltage close to the load. 4B -S I Negative sense. Connect to power ground close to the load. Output voltage pin strap. Used with external resistor to set the nominal output voltage. See section 5A VSET I Output Voltage Adjust using Pin-strap Resistor. Voltage Tracking input. Allows for tracking of output voltage to an external voltage. See section 5B VTRK I Voltage Tracking. O PMBus Alert. Asserted low when any of the configured protection mechanisms indicate a fault or a 6A SALERT Open-Drain warning. See section Monitoring Faults. PMBus Data. Data signal for PMBus communication. Requires a pull-up resistor even when 6B SDA I/O unused. See section PMBus Interface. PMBus Clock. Clock for PMBus communication. Requires a pull-up resistor even when unused. 7A SCL I/O See section PMBus Interface. Fault Indicator. For standalone operation this pin is not used and shall be left unconnected. For 7B FAULT I/O parallel operation this pin shall be connected between products using 0 Ω resistors. See section Parallel Operation. PMBus address pin strap. Used with external resistor to assign a unique PMBus address to the 8A SA I product. May be left open if PMBus is not used. See section PMBus Addressing. External switching frequency synchronization input or output. May be left open if unused. See 8B SYNC I/O section Synchronization. O Power Good output. Asserted high when the product is ready to provide regulated output voltage 9A PG Open-Drain to the load. See section Power Good. Remote Control. Can be used to enable/disable the output voltage of the product. May be left open 9B CTRL I if unused due to internal pull-up. See section Remote Control. Group Communication Bus. Used for current sharing, and inter-device communication. See section 10A GCB I/O Group Communication Bus. 10B PREF Power Pin-strap reference. Ground reference for pin-strap resistors. 11, 12 NC No Connect Support pins. These pins are only available in the horizontal mount TH and SMT versions. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 28 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Mechanical Information – Single-Inline-Package version E All component placements – whether shown as physical components or symbolical outline – are for reference only and are subject to change throughout the product’s life cycle, unless explicitly described and dimensioned in this drawing. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 29 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Mechanical Information - Horizontal mount, (Thru-Hole version) All component placements – whether shown as physical components or symbolical outline – are for reference only and are subject to change throughout the product’s life cycle, unless explicitly described and dimensioned in this drawing. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 30 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Mechanical Information – Horizontal mount, (SMT version) Beforereflowplacedonpaste hostboard Solderjoint Afterreflow All component placements – whether shown as physical components or symbolical outline – are for reference only and are subject to change throughout the product’s life cycle, unless explicitly described and dimensioned in this drawing. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 31 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Soldering Information – Surface Mounting and Hole Mount Maximum Product Temperature Requirements through Pin in Paste Assembly Top of the product PWB near pin 10A is chosen as reference location for the The surface mount product is intended for forced convection or vapor phase maximum (peak) allowed product temperature (TPRODUCT) since this will likely reflow soldering in SnPb or Pb-free processes. be the warmest part of the product during the reflow process. The reflow profile should be optimised to avoid excessive heating of the SnPb solder processes product. It is recommended to have a sufficiently extended preheat time to For SnPb solder processes, the product is qualified for MSL 1 according to ensure an even temperature across the host PWB and it is also IPC/JEDEC standard J-STD-020C. recommended to minimize the time in reflow. During reflow T must not exceed 225 °C at any time. PRODUCT A no-clean flux is recommended to avoid entrapment of cleaning fluids in cavities inside the product or between the product and the host board, Pb-free solder processes since cleaning residues may affect long time reliability and isolation For Pb-free solder processes, the product is qualified for MSL 3 according voltage. to IPC/JEDEC standard J-STD-020C. General reflow process specifications SnPb eutectic Pb-free During reflow TPRODUCT must not exceed 260 °C at any time. Average ramp-up (T ) 3°C/s max 3°C/s max PRODUCT Typical solder melting (liquidus) TL 183°C 221°C Dry Pack Information temperature Products intended for Pb-free reflow soldering processes are delivered in Minimum reflow time above TL 60 s 60 s standard moisture barrier bags according to IPC/JEDEC standard Minimum pin temperature T 210°C 235°C PIN J-STD-033 (Handling, packing, shipping and use of moisture/reflow Peak product temperature TPRODUCT 225°C 260°C sensitivity surface mount devices). Average ramp-down (TPRODUCT) 6°C/s max 6°C/s max Maximum time 25°C to peak 6 minutes 8 minutes Using products in high temperature Pb-free soldering processes requires dry pack storage and handling. In case the products have been stored in an uncontrolled environment and no longer can be considered dry, the Temperature modules must be baked according to J-STD-033. T maximum PRODUCT T minimum Pin PIN profile T L Thermocoupler Attachment Product profile Time in reflow Time in preheat / soak zone Time 25°C to peak Time Minimum Pin Temperature Recommendations Pin number 3C is chosen as reference location for the minimum pin temperature recommendation since this will likely be the coolest solder joint during the reflow process. Pin 3C for measurement of minimum SnPb solder processes Pin (solder joint) temperature, T PIN For SnPb solder processes, a pin temperature (TPIN) in excess of the solder melting temperature, (T , 183°C for Sn63Pb37) for more than 60 seconds L and a peak temperature of 220°C is recommended to ensure a reliable Top of PWB near solder joint. Pin 10A for measurement of maximum product temperature, For dry packed products only: depending on the type of solder paste and T PRODUCT flux system used on the host board, up to a recommended maximum temperature of 245°C could be used, if the products are kept in a controlled environment (dry pack handling and storage) prior to assembly. Lead-free (Pb-free) solder processes For Pb-free solder processes, a pin temperature (T ) in excess of the PIN solder melting temperature (T , 217 to 221°C for SnAgCu solder alloys) for L more than 60 seconds and a peak temperature of 245°C on all solder joints is recommended to ensure a reliable solder joint. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 32 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Soldering Information - Hole Mounting Tray Specifications The hole mounted product is intended for plated through hole mounting by wave or manual soldering. The pin temperature is specified to maximum Material ESD PS to 270°C for maximum 10 seconds. 5 Surface resistance 10 < Ohm/square < 10 Bakeability The trays are not bakeable A maximum preheat rate of 4°C/s and maximum preheat temperature of Tray thickness 18 mm [ 0.724 inch] 150°C is suggested. When soldering by hand, care should be taken to avoid direct contact between the hot soldering iron tip and the pins for Box capacity 144 products (8 full trays/box) more than a few seconds in order to prevent overheating. Tray weight 59.2 g empty [444.4 g full tray] A no-clean flux is recommended to avoid entrapment of cleaning fluids in cavities inside the product or between the product and the host board. The cleaning residues may affect long time reliability and isolation voltage. Delivery Package Information The products are delivered in antistatic trays (SIO variant) and in antistatic carrier tape (laydown variant EIA 481 standard). All versions are delivered in dry pack. Carrier Tape Specifications Material Antistatic PS 5 10 Surface resistance 10 < Ohm/square < 10 Bakeability The tape is not bakeable Tape width, W 72 mm [2.83 inch] Pocket pitch, P1 32 mm [1.26 inch] Pocket depth, K 14.6 mm [0.575 inch] 0 Reel diameter 330 mm [13 inch] Reel capacity 130 products /reel Reel weight 565 g empty [3347 g full reel] www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 33 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Product Qualification Specification Characteristics External visual inspection IPC-A-610 Temperature range -40 to 100°C Change of temperature IEC 60068-2-14 Na Number of cycles 1000 (Temperature cycling) Dwell/transfer time 15 min/0-1 min Temperature TA -45°C Cold (in operation) IEC 60068-2-1 Ad Duration 72 h Temperature 85°C Damp heat IEC 60068-2-67 Cy Humidity 85 % RH Duration 1000 hours Temperature 125°C Dry heat IEC 60068-2-2 Bd Duration 1000 h IEC 61340-3-1, JESD 22-A114 Human body model (HBM) Class 2, 2000 V Electrostatic discharge susceptibility IEC 61340-3-2, JESD 22-A115 Machine Model (MM) Class 3, 200 V Water 55°C Immersion in cleaning solvents IEC 60068-2-45 XA, method 2 Glycol ether 35°C Isopropyl alcohol 35°C Peak acceleration 100 g Mechanical shock IEC 60068-2-27 Ea Duration 6 ms Level 1 (SnPb-eutectic) 225°C 1 Moisture reflow sensitivity J-STD-020C Level 3 (Pb Free) 260°C Operational life test MIL-STD-202G, method 108A Duration 1000 h Solder temperature 270°C 2 Resistance to soldering heat IEC 60068-2-20 Tb, method 1A Duration 10-13 s IEC 60068-2-21 Test Ua1 Through hole mount products All leads Robustness of terminations IEC 60068-2-21 Test Ue1 Surface mount products All leads Preconditioning 150°C dry bake 16 h Temperature, SnPb Eutectic 215°C 1 IEC 60068-2-58 test Td Temperature, Pb-free 235°C Solderability Preconditioning Steam ageing 2 IEC 60068-2-20 test Ta Temperature, SnPb Eutectic 235°C Temperature, Pb-free 245°C Frequency 10 to 500 Hz 2 Vibration, broad band random IEC 60068-2-64 Fh, method 1 Spectral density 0.07 g /Hz Duration 10 min in each direction Notes 1 Only for products intended for reflow soldering (surface mount products) 2 Only for products intended for wave soldering (plated through hole products) www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 34 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Appendix - PMBus Commands This appendix contains a detailed reference of the PMBus commands supported by the product. Data Formats The products make use of a few standardized numerical formats, along with custom data formats. A detailed walkthrough of the above formats is provided in sections 7 and 8 of the PMBus Specification Part II. The custom data formats vary depending on the command, and are detailed in the command description. Standard Commands The functionality of commands with code 0x00 to 0xCF is usually based on the corresponding command specification provided in the PMBus Standard Specification Part II (see Power System Management Bus Protocol Documents below). However there might be different interpretations of the PMBus Standard Specification or only parts of the Standard Specification applied, thus the detailed command description below should always be consulted. Forum Websites The System Management Interface Forum (SMIF) http://www.powersig.org/ The System Management Interface Forum (SMIF) supports the rapid advancement of an efficient and compatible technology base that promotes power management and systems technology implementations. The SMIF provides a membership path for any company or individual to be active participants in any or all of the various working groups established by the implementer forums. Power Management Bus Implementers Forum (PMBUS-IF) http://pmbus.org/ The PMBus-IF supports the advancement and early adoption of the PMBus protocol for power management. This website offers recent PMBus specification documents, PMBus articles, as well as upcoming PMBus presentations and seminars, PMBus Document Review Board (DRB) meeting notes, and other PMBus related news. PMBus – Power System Management Bus Protocol Documents These specification documents may be obtained from the PMBus-IF website described above. These are required reading for complete understanding of the PMBus implementation. This appendix will not re-address all of the details contained within the two PMBus Specification documents. Specification Part I – General Requirements Transport And Electrical Interface Includes the general requirements, defines the transport and electrical interface and timing requirements of hard wired signals. Specification Part II – Command Language Describes the operation of commands, data formats, fault management and defines the command language used with the PMBus. SMBus – System Management Bus Documents System Management Bus Specification, Version 2.0, August 3, 2000 This specification specifies the version of the SMBus on which Revision 1.2 of the PMBus Specification is based. This specification is freely available from the System Management Interface Forum Web site at: http://www.smbus.org/specs/ www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 35 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series PMBus Command Summary and Factory Default Values The default values provided in the table below is valid for the specified variant. Code Name Data Format Factory Default Value 0x01 OPERATION R/W Byte 0x80 0x02 ON_OFF_CONFIG R/W Byte 0x17 0x03 CLEAR_FAULTS Send Byte 0x11 STORE_DEFAULT_ALL Send Byte 0x12 RESTORE_DEFAULT_ALL Send Byte 0x15 STORE_USER_ALL Send Byte 0x16 RESTORE_USER_ALL Send Byte 0x20 VOUT_MODE Read Byte 0x13 0x21 VOUT_COMMAND R/W Word 0x22 VOUT_TRIM R/W Word 0x0000 0.0 V 0x23 VOUT_CAL_OFFSET R/W Word Unit Specific 0x24 VOUT_MAX R/W Word 0x25 VOUT_MARGIN_HIGH R/W Word 0x26 VOUT_MARGIN_LOW R/W Word 0x27 VOUT_TRANSITION_RATE R/W Word 0xBA00 1.0 V/ms 0x28 VOUT_DROOP R/W Word 0x0000 0.0 mV/A 0x33 FREQUENCY_SWITCH R/W Word 0xFA80 320.0 kHz 0x37 INTERLEAVE R/W Word 0x40 VOUT_OV_FAULT_LIMIT R/W Word 0x41 VOUT_OV_FAULT_RESPONSE R/W Byte 0xBF 0x44 VOUT_UV_FAULT_LIMIT R/W Word 0x45 VOUT_UV_FAULT_RESPONSE R/W Byte 0xBF 0x46 IOUT_OC_FAULT_LIMIT R/W Word 0xEA30 70.0 A 0x4B IOUT_UC_FAULT_LIMIT R/W Word 0xE4E0 -50.0 A 0x4F OT_FAULT_LIMIT R/W Word 0xEBE8 125.0 °C 0x50 OT_FAULT_RESPONSE R/W Byte 0xBF 0x51 OT_WARN_LIMIT R/W Word 0xEB70 110.0 °C 0x52 UT_WARN_LIMIT R/W Word 0xE4E0 -50.0 °C 0x53 UT_FAULT_LIMIT R/W Word 0xE490 -55.0 °C 0x54 UT_FAULT_RESPONSE R/W Byte 0xBF 0x55 VIN_OV_FAULT_LIMIT R/W Word 0xDA00 16.0 V 0x56 VIN_OV_FAULT_RESPONSE R/W Byte 0xBF 0x57 VIN_OV_WARN_LIMIT R/W Word 0xD3C0 15.0 V 0x58 VIN_UV_WARN_LIMIT R/W Word 0xCB73 6.9 V 0x59 VIN_UV_FAULT_LIMIT R/W Word 0xCB33 6.4 V 0x5A VIN_UV_FAULT_RESPONSE R/W Byte 0xBF 0x5E POWER_GOOD_ON R/W Word 0x60 TON_DELAY R/W Word 0xCA80 5.0 ms 0x61 TON_RISE R/W Word 0xCA80 5.0 ms 0x64 TOFF_DELAY R/W Word 0x0000 0.0 ms 0x65 TOFF_FALL R/W Word 0xCA80 5.0 ms 0x78 STATUS_BYTE Read Byte www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 36 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Code Name Data Format Factory Default Value 0x79 STATUS_WORD Read Word 0x7A STATUS_VOUT Read Byte 0x7B STATUS_IOUT Read Byte 0x7C STATUS_INPUT Read Byte 0x7D STATUS_TEMPERATURE Read Byte 0x7E STATUS_CML Read Byte 0x80 STATUS_MFR_SPECIFIC Read Byte 0x88 READ_VIN Read Word 0x8B READ_VOUT Read Word 0x8C READ_IOUT Read Word 0x8D READ_TEMPERATURE_1 Read Word 0x8E READ_TEMPERATURE_2 Read Word 0x8F READ_TEMPERATURE_3 Read Word 0x94 READ_DUTY_CYCLE Read Word 0x95 READ_FREQUENCY Read Word 0x98 PMBUS_REVISION Read Byte 0x99 MFR_ID R/W Block (22) Unit Specific 0x9A MFR_MODEL R/W Block (14) Unit Specific 0x9B MFR_REVISION R/W Block (24) Unit Specific 0x9C MFR_LOCATION R/W Block (7) Unit Specific 0x9D MFR_DATE R/W Block (10) Unit Specific 0x9E MFR_SERIAL R/W Block (13) Unit Specific 0xAD IC_DEVICE_ID Read Block (4) 0xAE IC_DEVICE_REV Read Block (4) 0xB0 USER_DATA_00 R/W Block (23) Unit Specific 0xB1 USER_DATA_01 R/W Block (8) Unit Specific 0xBF DEADTIME_MAX R/W Word 0x3838 56 ns, 56 ns 0xCA IOUT0_CAL_GAIN R/W Word Unit Specific 0xCB IOUT1_CAL_GAIN R/W Word Unit Specific 0xCC IOUT0_CAL_OFFSET R/W Word Unit Specific 0xCD IOUT1_CAL_OFFSET R/W Word Unit Specific 0xCE MIN_VOUT_REG R/W Word 0xF258 150.0 mV 0xD0 ISENSE_CONFIG R/W Word 0x3206 0xD1 USER_CONFIG R/W Word 0x1480 0xD3 GCB_CONFIG R/W Word 0xD4 POWER_GOOD_DELAY R/W Word 0xC200 2.0 ms 0xD5 MULTI_PHASE_RAMP_GAIN R/W Byte 0x03 0xD6 INDUCTOR R/W Word 0xAB9A 0.5 μH 0xD7 SNAPSHOT_FAULT_MASK R/W Word 0x0200 0xD8 OVUV_CONFIG R/W Byte 0x0F 0xD9 XTEMP_SCALE R/W Word 0xBA00 0xDA XTEMP_OFFSET R/W Word 0x0000 0.0 °C 0xDB MFR_SMBALERT_MASK R/W Block (7) 0x22000000000000 0xDC TEMPCO_CONFIG R/W Byte 0x2D 45 x 100ppm/°C 0xDD DEADTIME R/W Word 0x1010 16 ns, 16 ns 0xDE DEADTIME_CONFIG R/W Word 0x8888 8 x 2ns, 8 x 2ns 0xDF ASCR_CONFIG R/W Block (4) 0x015A012C 0xE0 SEQUENCE R/W Word 0x0000 www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 37 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Code Name Data Format Factory Default Value 0xE1 TRACK_CONFIG R/W Byte 0x00 0xE2 GCB_GROUP R/W Block (4) 0x00000000 0xE3 READ_IOUT1 Read Word 0xE4 DEVICE_ID Read Block (16) 0xE5 MFR_IOUT_OC_FAULT_RESPONSE R/W Byte 0xBF 0xE6 MFR_IOUT_UC_FAULT_RESPONSE R/W Byte 0xBF 0xE7 IOUT_AVG_OC_FAULT_LIMIT R/W Word 0xE390 57.0 A 0xE8 IOUT_AVG_UC_FAULT_LIMIT R/W Word 0xDC40 -30.0 A 0xE9 MFR_USER_CONFIG R/W Word 0x0000 0xEA SNAPSHOT Read Block (32) 0xEB BLANK_PARAMS Read Block (16) 0xF0 LEGACY_FAULT_GROUP R/W Block (4) 0x00000000 0xF2 READ_IOUT0 Read Word 0xF3 SNAPSHOT_CONTROL R/W Byte 0x00 0xF5 MFR_VMON_OV_FAULT_LIMIT R/W Word 0xCA33 4.4 V 0xF6 MFR_VMON_UV_FAULT_LIMIT R/W Word 0xBA00 1.0 V 0xF7 MFR_READ_VMON Read Word 0xF8 VMON_OV_FAULT_RESPONSE R/W Byte 0xBF 0xF9 VMON_UV_FAULT_RESPONSE R/W Byte 0x00 0xFA SECURITY_LEVEL Read Byte 0xFB PRIVATE_PASSWORD R/W Block (9) Unit Specific 0xFC PUBLIC_PASSWORD R/W Block (4) Unit Specific 0xFD UNPROTECT R/W Block (32) Unit Specific PMBus Command Details OPERATION (0x01) Transfer Type: R/W Byte Description: Controls enable and margin operations. Bit Function Description Value Function Description 7:6 Enable Make the device enable or 00 Immediate Off Disable Immediately without disable if PMBus Enable has been controlled ramp-down. activated in ON_OFF_CONFIG. 01 Soft Off Disable "Softly" by controlled ramp-down defined by TOFF_FALL. 10 Enable Enable device to the chosen voltage level. 5:4 Margin Select between margin high/low 00 Nominal Operate at nominal output states or nominal output. voltage. 01 Margin Low Operate at voltage set by command VOUT_MARGIN_LOW. 10 Margin High Operate at voltage set by command VOUT_MARGIN_HIGH. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 38 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Function Description 3:2 Act on Fault Controls whether the device 01 Ignore Faults Ignore Faults when in a during margining will ignore or margined state. handle overvoltage/undervoltage 10 Act on Faults Act on Faults when in a warnings and faults and respond margined state. as programmed by the fault response commands. ON_OFF_CONFIG (0x02) Transfer Type: R/W Byte Description: Configures how the device is controlled by the CTRL pin and the PMBus. Bit Function Description Value Function Description 4 Powerup 1 CTRL pin or Device does not power up until Operation PMBus commanded by the CTRL pin or OPERATION command. 3 PMBus Enable Controls how the device responds 0 Ignore PMBus Ignores the on/off portion of the Mode to the PMBus command command OPERATION command. OPERATION. 1 Use PMBus Device requires on by command OPERATION command to enable the output voltage. 2 Enable Pin Controls how the device responds 0 Ignore CTRL Device ignores the CTRL pin. Mode to the CTRL pin. pin 1 Use CTRL pin Device requires the CTRL pin to be asserted to enable the output voltage. 1 Enable Pin Polarity of the CTRL pin. 0 Active Low CTRL pin will cause device to Polarity enable when driven low. 1 Active High CTRL pin will cause device to enable when driven high. 0 Disable Action CTRL pin action when 0 Soft Off Use the configured turn off commanding the output to turn delay and fall time. off. 1 Immediate Off Turn off the output and stop transferring energy to the output as fast as possible. The device's product literature shall specify whether or not the device sinks current to decrease the output voltage fall time. CLEAR_FAULTS (0x03) Transfer Type: Send Byte Description: Clears all fault status bits STORE_DEFAULT_ALL (0x11) Transfer Type: Send Byte Description: Commands the device to store its configuration into the Default Store. RESTORE_DEFAULT_ALL (0x12) www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 39 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Transfer Type: Send Byte Description: Commands the device to restore its configuration from the Default Store. STORE_USER_ALL (0x15) Transfer Type: Send Byte Description: Stores, at the USER level, all PMBus values that were changed since the last restore command. To add to the USER store, perform a RESTORE_USER_ALL, write commands to be added, then STORE_USER_ALL. Wait 20 ms after a STORE_USER_ALL command before issuing another PMBus command. RESTORE_USER_ALL (0x16) Transfer Type: Send Byte Description: Restores PMBus settings that were stored using STORE_USER_ALL. This command is automatically performed at power up. The values restored will overwrite the values previously loaded by the RESTORE_DEFAULT_ALL command. The security level is changed to Level 1 following this command. Wait 20 ms after a RESTORE_USER_ALL command before issuing another PMBus command. VOUT_MODE (0x20) Transfer Type: Read Byte Description: Controls how future VOUT-related commands parameters will be interpreted. Bit Function Description Format 4:0 Five bit two's complement EXPONENT for the MANTISSA delivered as the Integer Signed data bytes for VOUT_COMMAND in VOUT_LINEAR Mode. Bit Function Description Value Function Description 7:5 Selection of mode for 000 Linear Linear Mode Format. representation of output voltage 001 VID VID Mode. parameters. 010 Direct Direct Mode. VOUT_COMMAND (0x21) Transfer Type: R/W Word Description: Sets the nominal value of the output voltage. Bit Description Format Unit 15:0 Sets the nominal value of the output voltage. Vout Mode V Unsigned VOUT_TRIM (0x22) Transfer Type: R/W Word Description: Configures a fixed offset to be applied to the output voltage when enabled. Bit Description Format Unit 15:0 Sets VOUT trim value. The range is limited to +/-150 mV. Vout Mode V Signed VOUT_CAL_OFFSET (0x23) Transfer Type: R/W Word Description: Configures a fixed offset to be applied to the output voltage when enabled. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 40 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Description Format Unit 15:0 Sets VOUT calibration offset(same function as VOUT_TRIM). Vout Mode V Signed VOUT_MAX (0x24) Transfer Type: R/W Word Description: Configures the maximum allowed output voltage. Bit Description Format Unit 15:0 If the device is commanded to a Vout value higher than this level, the output voltage will be Vout Mode V clamped to this level. The max VOUT_MAX setting is 115% of the VSET pin-strap setting. Unsigned VOUT_MARGIN_HIGH (0x25) Transfer Type: R/W Word Description: Configures the target for margin-up commands. Bit Description Format Unit 15:0 Sets the output voltage value during a margin high. Vout Mode V Unsigned VOUT_MARGIN_LOW (0x26) Transfer Type: R/W Word Description: Configures the target for margin-down commands. Bit Description Format Unit 15:0 Sets the output voltage value during a margin low. Vout Mode V Unsigned VOUT_TRANSITION_RATE (0x27) Transfer Type: R/W Word Description: Sets the transition rate when changing output voltage. Bit Description Format Unit 15:0 Configures the transition time for margining and on-the-fly VOUT_COMMAND changes. Linear V/ms VOUT_DROOP (0x28) Transfer Type: R/W Word Description: Configures a droop of output voltage. Bit Description Format Unit 15:0 Sets the effective load line (V/I slope) for the rail in which the device is used. When the Linear mV/A device is part of a current sharing rail, this value must be non-zero and the same for all devices in the rail. FREQUENCY_SWITCH (0x33) Transfer Type: R/W Word Description: Controls the switching frequency. Bit Description Format Unit www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 41 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Description Format Unit 15:0 Sets the switching frequency in 1 kHz steps. The specified range is 200 - 640 kHz. Linear kHz INTERLEAVE (0x37) Transfer Type: R/W Word Description: Configures the phase offset with respect to a common SYNC clock. Bit Function Description Format 15:8 Dummy Not used. Integer Unsigned 7:4 Number of Value 0-15. Sets the number of rails in the group. A value of 0 is Integer Unsigned Rails interpreted as 16. 3:0 Rail Position Value 0-15. Sets position of the device's rail within the group. Integer Unsigned VOUT_OV_FAULT_LIMIT (0x40) Transfer Type: R/W Word Description: Sets the VOUT overvoltage fault threshold. Bit Description Format Unit 15:0 Sets the VOUT overvoltage fault threshold. Vout Mode V Unsigned VOUT_OV_FAULT_RESPONSE (0x41) Transfer Type: R/W Byte Description: Sets the VOUT OV fault response. Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms 100 175 ms 101 210 ms www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 42 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Function Description 110 245 ms 111 280 ms VOUT_UV_FAULT_LIMIT (0x44) Transfer Type: R/W Word Description: Sets the VOUT under-voltage fault threshold. This threshold is also used for deasserting PG (Power Good). Bit Description Format Unit 15:0 Sets the VOUT under-voltage fault threshold Vout Mode V Unsigned VOUT_UV_FAULT_RESPONSE (0x45) Transfer Type: R/W Byte Description: Sets the VOUT UV LIMIT Response. Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms 100 175 ms 101 210 ms 110 245 ms 111 280 ms IOUT_OC_FAULT_LIMIT (0x46) Transfer Type: R/W Word Description: Sets the output over-current peak limit. Bit Description Format Unit www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 43 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Description Format Unit 15:0 Sets the IOUT overcurrent peak fault threshold for each phase, i.e. either phase can trigger Linear A an overcurrent fault. Thus, the effective fault threshold will be twice the value of this command. IOUT_UC_FAULT_LIMIT (0x4B) Transfer Type: R/W Word Description: Sets the output under-current peak limit. Bit Description Format Unit 15:0 Sets the IOUT undercurrent peak fault threshold for each phase, i.e. either phase can Linear A trigger an undercurrent fault. Thus, the effective fault threshold will be twice the value of this command. OT_FAULT_LIMIT (0x4F) Transfer Type: R/W Word Description: Sets the over-temperature fault limit. Bit Description Format Unit 15:0 Sets the over-temperature fault threshold. Linear °C OT_FAULT_RESPONSE (0x50) Transfer Type: R/W Byte Description: Sets the over-temperature fault response. Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms 100 175 ms 101 210 ms www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 44 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Function Description 110 245 ms 111 280 ms OT_WARN_LIMIT (0x51) Transfer Type: R/W Word Description: Sets the over-temperature warning limit. Bit Description Format Unit 15:0 Sets the over-temperature warning threshold. Linear °C UT_WARN_LIMIT (0x52) Transfer Type: R/W Word Description: Sets the under-temperature warning limit. Bit Description Format Unit 15:0 Sets the undertemperature warning threshold. Linear °C UT_FAULT_LIMIT (0x53) Transfer Type: R/W Word Description: Sets the under-temperature fault limit. Bit Description Format Unit 15:0 Sets the undertemperature fault threshold. Linear °C UT_FAULT_RESPONSE (0x54) Transfer Type: R/W Byte Description: Sets the under-temperature fault response. Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 45 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Function Description retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms 100 175 ms 101 210 ms 110 245 ms 111 280 ms VIN_OV_FAULT_LIMIT (0x55) Transfer Type: R/W Word Description: Sets the input over-voltage fault limit. Bit Description Format Unit 15:0 Sets the VIN overvoltage fault threshold. Linear V VIN_OV_FAULT_RESPONSE (0x56) Transfer Type: R/W Byte Description: Sets the input over-voltage fault response. Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms 100 175 ms 101 210 ms 110 245 ms 111 280 ms VIN_OV_WARN_LIMIT (0x57) Transfer Type: R/W Word Description: Sets the input over-voltage warning limit. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 46 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Description Format Unit 15:0 Sets the VIN overvoltage warning threshold. Linear V VIN_UV_WARN_LIMIT (0x58) Transfer Type: R/W Word Description: Sets the input under-voltage warning limit. Bit Description Format Unit 15:0 Sets the VIN undervoltage warning threshold. Linear V VIN_UV_FAULT_LIMIT (0x59) Transfer Type: R/W Word Description: Sets the input under-voltage fault limit. Bit Description Format Unit 15:0 Sets the VIN undervoltage fault threshold. Linear V VIN_UV_FAULT_RESPONSE (0x5A) Transfer Type: R/W Byte Description: Sets the input under-voltage fault response. Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms 100 175 ms 101 210 ms 110 245 ms 111 280 ms POWER_GOOD_ON (0x5E) www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 47 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Transfer Type: R/W Word Description: Sets the output voltage threshold for asserting PG (Power Good). Bit Description Format Unit 15:0 Sets the output voltage threshold for asserting PG (Power Good). Vout Mode V Unsigned TON_DELAY (0x60) Transfer Type: R/W Word Description: Sets the turn-on delay time Bit Description Format Unit 15:0 Sets the delay time from ENABLE to start of the rise of the output voltage. The time can Linear ms range from 3 ms up to 250 ms. TON_RISE (0x61) Transfer Type: R/W Word Description: Sets the turn-on ramp-up time. Bit Description Format Unit 15:0 Sets the rise time of VOUT after ENABLE and On Delay. The time can range from 0 ms to Linear ms 100 ms. TOFF_DELAY (0x64) Transfer Type: R/W Word Description: Sets the turn-off delay. Bit Description Format Unit 15:0 Sets the delay time from DISABLE to start of the fall of the output voltage. Normally the Linear ms time can range from 4 ms up to 250 ms. A value of 0 ms can be set to guarantee a fast shut-off, but this will force the device to Immediate Off behaviour, even if soft-off, i.e. ramp-down, is configured (in ON_OFF_CONFIG). TOFF_FALL (0x65) Transfer Type: R/W Word Description: Sets the turn-off ramp-down time. Bit Description Format Unit 15:0 Sets the fall time for VOUT after DISABLE and Off Delay. The time can range from 0 ms to Linear ms 100 ms. STATUS_BYTE (0x78) Transfer Type: Read Byte Description: Returns a brief fault/warning status byte. Bit Function Description Value Description 7 Busy A fault was declared because the device was busy 0 No fault and unable to respond. 1 Fault 6 Off This bit is asserted if the unit is not providing 0 No fault www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 48 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Description power to the output, regardless of the reason, 1 Fault including simply not being enabled. 5 Vout Overvoltage An output overvoltage fault has occurred. 0 No fault Fault 1 Fault 4 Iout Overcurrent Fault An output overcurrent fault has occurred. 0 No fault 1 Fault 3 Vin Undervoltage An input undervoltage fault has occurred. 0 No fault Fault 1 Fault 2 Temperature A temperature fault or warning has occurred. 0 No fault 1 Fault 1 Communication/Logic A communications, memory or logic fault has 0 No fault occurred. 1 Fault STATUS_WORD (0x79) Transfer Type: Read Word Description: Returns an extended fault/warning status byte. Bit Function Description Value Description 15 Vout An output voltage fault or warning has occurred. 0 No fault 1 Fault 14 Iout An output current fault or warning has occurred. 0 No Fault. 1 Fault. 13 Input An input voltage, input current, or input power fault 0 No Fault. or warning has occurred. 1 Fault. 12 Mfr A manufacturer specific fault or warning has 0 No Fault. occurred. 1 Fault. 11 Power-Good The Power-Good signal, if present, is negated. 0 No Fault. 1 Fault. 9 Other A bit in STATUS_VOUT, STATUS_IOUT, 0 No Fault. STATUS_INPUT, STATUS_TEMPERATURE, 1 Fault. STATUS_CML or STATUS_MFR_SPECIFIC is set. 7 Busy A fault was declared because the device was busy 0 No Fault. and unable to respond. 1 Fault. 6 Off This bit is asserted if the unit is not providing 0 No Fault. power to the output, regardless of the reason, 1 Fault. including simply not being enabled. 5 Vout Overvoltage An output overvoltage fault has occurred. 0 No Fault. Fault 1 Fault. 4 Iout Overcurrent Fault An output overcurrent fault has occurred. 0 No Fault. 1 Fault. 3 Vin Undervoltage An input undervoltage fault has occurred. 0 No Fault. Fault 1 Fault. 2 Temperature A temperature fault or warning has occurred. 0 No Fault. 1 Fault. 1 Communication/Logic A communications, memory or logic fault has 0 No fault. occurred. 1 Fault. STATUS_VOUT (0x7A) www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 49 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Transfer Type: Read Byte Description: Returns Vout-related fault/warning status bits. Bit Function Description Value Description 7 Vout Overvoltage Vout Overvoltage Fault. 0 No Fault. Fault 1 Fault. 4 Vout Undervoltage Vout Undervoltage Fault. 0 No Fault. Fault 1 Fault. STATUS_IOUT (0x7B) Transfer Type: Read Byte Description: Returns Iout-related fault/warning status bits. Bit Function Description Value Description 7 Iout Overcurrent Fault Iout Overcurrent Fault. 0 No Fault. 1 Fault. 4 Iout Undercurrent Iout Undercurrent Fault. 0 No Fault. Fault 1 Fault. STATUS_INPUT (0x7C) Transfer Type: Read Byte Description: Returns VIN/IIN-related fault/warning status bits. Bit Function Description Value Description 7 Vin Overvoltage Fault Vin Overvoltage Fault. 0 No Fault. 1 Fault. 6 Vin Overvoltage VIN Overvoltage Warning. 0 No Warning. Warning 1 Warning. 5 Vin Undervoltage Vin Undervoltage Warning. 0 No Warning. Warning 1 Warning. 4 Vin Undervoltage Vin Undervoltage Fault. 0 No Fault. Fault 1 Fault. STATUS_TEMPERATURE (0x7D) Transfer Type: Read Byte Description: Returns the temperature-related fault/warning status bits Bit Function Description Value Description 7 Overtemperature Overtemperature Fault. 0 No Fault. Fault 1 Fault. 6 Overtemperature Overtemperature Warning. 0 No Warning. Warning 1 Warning. 5 Undertemperature Undertemperature Warning. 0 No Warning. Warning 1 Warning. 4 Undertemperature Undertemperature Fault. 0 No Fault. Fault 1 Fault. 3 Internal Temp Sensor A warning or fault occurred from the internal 0 No Fault. Fault temperature sensor. 1 Fault. 2 External Temp A warning or fault occurred from the external 0 No Fault. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 50 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Description Sensor 0 Fault temperature sensor 0 (not used). 1 Fault. 1 External Temp A warning or fault occurred from the external 0 No Fault. Sensor 1 Fault temperature sensor 1 (not used). 1 Fault. STATUS_CML (0x7E) Transfer Type: Read Byte Description: Returns Communication/Logic/Memory-related fault/warning status bits. Bit Function Description Value Description 7 Invalid Or Invalid Or Unsupported Command Received. 0 No Invalid Command Unsupported Received. Command Received 1 Invalid Command Received. 6 Invalid Or Invalid Or Unsupported Data Received. 0 No Invalid Data Unsupported Data Received. Received 1 Invalid Data Received. 5 Packet Error Check Packet Error Check (PEC) Failed. 0 No Failure. Failed 1 Failure. 3 CRC Fault A CRC fault was detected. 0 No Fault. 1 Fault. 2 CPU Fault A CPU fault was detected. 0 No Fault. 1 Fault. 1 Other Communication A PMBus command tried to write to a read-only or 0 No Fault. Fault protected command, or a communication fault 1 Fault. other than the ones listed in this table has occurred. STATUS_MFR_SPECIFIC (0x80) Transfer Type: Read Byte Description: Returns manufacturer specific status information. Bit Function Description Value Description 7 Multi phase init error A phase or phases of a multi-phase current sharing 0 No Fault. group did not initialize. 1 Fault. 6 GCB fault An error occurred in GCB communication 0 No Fault. 1 Fault. 5 VMON UV warning VMON under voltage warning. The warning limit is 0 No Fault. 110% of the configured VMON UV fault limit. 1 Fault. 4 VMON OV warning VMON over voltage warning. The warning limit is 0 No Fault. 95% of the configured VMON OV fault limit. 1 Fault. 3 Clock Fail/Loss of External Switching Period Fault (TSW); indicates 0 No Fault. sync loss of external SYNC clock. 1 Fault. 2 Group fault A rail in the fault group has failed. 0 No Fault. 1 Fault. 1 VMON UV fault VMON under voltage fault 0 No Fault. 1 Fault. 0 VMON OV fault VMON over voltage fault. 0 No Fault. 1 Fault. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 51 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series READ_VIN (0x88) Transfer Type: Read Word Description: Returns the measured input voltage. Bit Description Format Unit 15:0 Returns the input voltage reading. Linear V READ_VOUT (0x8B) Transfer Type: Read Word Description: Returns the measured output voltage. Bit Description Format Unit 15:0 Returns the measured output voltage. Vout Mode V Unsigned READ_IOUT (0x8C) Transfer Type: Read Word Description: Returns the measured output current. Bit Description Format Unit 15:0 Returns the output current reading. The device will NACK this command when not enabled Linear A and not in the USER_CONFIG monitor mode. READ_TEMPERATURE_1 (0x8D) Transfer Type: Read Word Description: Returns the measured temperature (internal). Bit Description Format Unit 15:0 Returns the measured temperature of internal sensor. Linear °C READ_TEMPERATURE_2 (0x8E) Transfer Type: Read Word Description: Returns the measured temperature of external sensor 0 (not used). Bit Description Format Unit 15:0 Returns the measured temperature of external sensor 0 (not used). Linear °C READ_TEMPERATURE_3 (0x8F) Transfer Type: Read Word Description: Returns the measured temperature of external sensor 1 (not used). Bit Description Format Unit 15:0 Returns the measured temperature of external sensor 1 (not used). Linear °C READ_DUTY_CYCLE (0x94) Transfer Type: Read Word Description: Returns the measured duty cycle in percent. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 52 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Description Format Unit 15:0 Returns the target duty cycle during the ENABLE state. The device will NACK this command Linear % when not enabled and not in the USER_CONFIG monitor mode. READ_FREQUENCY (0x95) Transfer Type: Read Word Description: Returns the measured switching frequency. Bit Description Format Unit 15:0 Returns the measured operating switch frequency. Linear kHz PMBUS_REVISION (0x98) Transfer Type: Read Byte Description: Returns the PMBus revision number for this device. Bit Function Description Value Function Description 7:4 Part I Revision Part I Revision. 0000 1.0 Part I Revision 1.0. 0001 1.1 Part I Revision 1.1. 0010 1.2 Part I Revision 1.2. 3:0 Part II Revision Part II Revision. 0000 1.0 Part II Revision 1.0. 0001 1.1 Part II Revision 1.1. 0010 1.2 Part II Revision 1.2. MFR_ID (0x99) Transfer Type: R/W Block (22 bytes) Description: Sets the manufacturer ID String. Bit Description Format 21:0 Maximum of 22 characters. ASCII MFR_MODEL (0x9A) Transfer Type: R/W Block (14 bytes) Description: Sets the manufacturer model string. Bit Description Format 13:0 Maximum of 14 characters. ASCII MFR_REVISION (0x9B) Transfer Type: R/W Block (24 bytes) Description: Sets the manufacturer revision string. Bit Description Format 23:0 Maximum of 24 characters. ASCII MFR_LOCATION (0x9C) Transfer Type: R/W Block (7 bytes) Description: Sets the manufacturer location string. Bit Description Format www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 53 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Description Format 6:0 Maximum of 7 characters. ASCII MFR_DATE (0x9D) Transfer Type: R/W Block (10 bytes) Description: Sets the manufacturer date at YYMMDD. Bit Description Format 9:0 Maximum of 10 characters. ASCII MFR_SERIAL (0x9E) Transfer Type: R/W Block (13 bytes) Description: Sets the manufacturer serial string. Bit Description Format 12:0 Maximum of 13 characters. ASCII IC_DEVICE_ID (0xAD) Transfer Type: Read Block (4 bytes) Description: Bit Description Format 3:0 ASCII fixed length IC_DEVICE_REV (0xAE) Transfer Type: Read Block (4 bytes) Description: Bit Description Format 3:0 ASCII fixed length USER_DATA_00 (0xB0) Transfer Type: R/W Block (23 bytes) Description: Sets a user defined data string. Bit Description Format 22:0 Maximum of 23 characters. ASCII USER_DATA_01 (0xB1) Transfer Type: R/W Block (8 bytes) Description: Sets a user defined data string. This is a fixed length command with dedicated 8 bytes. If the string is shorter than 8 characters the program will fill with zero data up to 8 bytes. Bit Description Format 7:0 Maximum of 8 characters. ASCII fixed length DEADTIME_MAX (0xBF) Transfer Type: R/W Word Description: Sets the maximum deadtime value for the adaptive deadtime algorithm. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 54 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Format Unit 14:8 Deadtime max Value 0 to 60 ns. Maximum allowed H-L (high-side to low-side) deadtime. Integer ns Signed 6:0 Deadtime max Value 0 to 60 ns. Maximum allowed L-H (low-side to high-side) deadtime. Integer ns Signed IOUT0_CAL_GAIN (0xCA) Transfer Type: R/W Word Description: Sets the current sense resistance for phase 0. Bit Description Format Unit 15:0 Sets the effective impedance for phase 0 current sensing at +25°C. Linear mΩ IOUT1_CAL_GAIN (0xCB) Transfer Type: R/W Word Description: Sets the current sense resistance for phase 1. Bit Description Format Unit 15:0 Sets the effective impedance for phase 1 current sensing at +25°C. Linear mΩ IOUT0_CAL_OFFSET (0xCC) Transfer Type: R/W Word Description: Sets the current-sense offset for phase 0. Bit Description Format Unit 15:0 Sets an offset to phase 0 IOUT readings. Use to compensate for delayed measurements of Linear A current ramp. IOUT1_CAL_OFFSET (0xCD) Transfer Type: R/W Word Description: Sets the current-sense offset for phase 1. Bit Description Format Unit 15:0 Sets an offset to phase 1 IOUT readings. Use to compensate for delayed measurements of Linear A current ramp. MIN_VOUT_REG (0xCE) Transfer Type: R/W Word Description: Minimum regulation voltage. Bit Description Format Unit 15:0 Sets the minimum output voltage that the device will attempt to regulate to during start-up Linear mV and shut-down ramps. ISENSE_CONFIG (0xD0) Transfer Type: R/W Word Description: Configures the current sense circuitry. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 55 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Function Description 15:11 Current Sense Sets the current sense blanking 00000 0 ns Blanking time (i.e. the time after switch 00001 32 ns Delay transition before current 00010 64 ns measurement starts) in 00011 96 ns increments of 32ns. 00100 128 ns 00101 160 ns 00110 192 ns 00111 224 ns 01000 256 ns 01001 288 ns 01010 320 ns 01011 352 ns 01100 384 ns 01101 416 ns 01110 448 ns 01111 480 ns 10000 512 ns 10001 544 ns 10010 576 ns 10011 608 ns 10100 640 ns 10101 672 ns 10110 704 ns 10111 736 ns 11000 768 ns 11001 800 ns 11010 832 ns 10:8 Current Sense Sets the number of consecutive 000 1 Fault Count over-current (OC) or under- 001 3 current (UC) events required for a 010 5 fault. An event can occur once 011 7 during each switching cycle. For 100 9 example, if 5 is selected, an OC 101 11 or UC event must occur for 5 110 13 consecutive switching cycles, 111 15 resulting in a delay of at least 5 switching periods. 3:2 Current Sense Selection of DCR current sensing 01 DCR Down Measurements at down slope of Control method across inductor. Slope ripple current. 10 DCR Up Slope Measurements at up slope of ripple current. 1:0 Current Sense Sets the range of the current 00 Low range Range sense ADC. ±25 mV 01 Mid range ±35 mV 10 High range ±50 mV USER_CONFIG (0xD1) www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 56 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Transfer Type: R/W Word Description: Sets misc. device configurations. Bit Function Description Format 15:11 Minimum Duty Value 0-31. Sets the minimum duty cycle to 2 x (value + 1) / 512 x Tsw Integer Unsigned Cycle when enabled by Bit 7 (Tsw = switching period). Bit Function Description Value Function Description 10 Power device Enable or disable power device 1 Power device drive is enabled. drive drive. 0 Power device drive is disabled. 7 Min. Duty Enable or disable minimum duty 1 Minimum Duty Cycle Enabled. Cycle Control cycle. 0 Minimum Duty Cycle Disabled. 2 PG Pin Output PG Pin Output Control. 0 Open-Drain PG is open-drain Control 1 Push-Pull PG is push-pull 1 Ext. Temp Enable or disable external 1 External temperature sensor Sense temperature sensor (not used). enabled. When enabled it will be used for 0 External temperature sensor temp compensation of read disabled. current. 0 Ext. Temp Selects external temperature 1 Select external temperature Sense for sensor to determine temperature sensor. Faults faults (not used). 0 Do not select external temperature sensor (internal sensor is used). GCB_CONFIG (0xD3) Transfer Type: R/W Word Description: Configures the Group Communication Bus addressing and current sharing. Bit Function Description Format 12:8 GCB/Rail ID Value 0-31. Sets the rail’s GCB ID for current sharing, sequencing and Integer Unsigned fault spreading. All devices within a current sharing group must be assigned the same GCB ID. Bit Function Description Value Function Description 15:13 Phase ID Value 0-3. Sets a device's 00 Position 1 position within a current sharing 01 Position 2 group (-1). 10 Position 3 11 Position 4 3:0 Phases in rail Value 1, 3, 5 or 7. Identifies the 001 2 phases number of phases on the same 011 4 phases rail. 101 6 phases 111 8 phases POWER_GOOD_DELAY (0xD4) Transfer Type: R/W Word Description: Sets the Power-Good delay time. Bit Description Format Unit www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 57 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Description Format Unit 15:0 Sets the delay applied between the output exceeding the PG threshold (POWER_GOOD_ON) Linear ms and asserting the PG pin. The delay time can range from 0 ms up to 5000 ms. Inside the device, the set value will be rounded to closest integer value. MULTI_PHASE_RAMP_GAIN (0xD5) Transfer Type: R/W Byte Description: This command value indirectly determines the output voltage rise time for current sharing rails. Typical gain values range from 1 to 5. Lower gain values produce longer ramp times. This ramp mode is automatically selected when the product is configured for current sharing. When in current sharing ramp mode, the normal high bandwidth turn-on ramp is disabled, resulting in a lower loop bandwidth during start-up ramps. Large load current transitions during multi-phase ramp-ups will cause output voltage discontinuities. Once Power Good has been asserted, the normal high bandwidth control loop is enabled and the product operates normally. When in a current sharing setup, Soft Off ramps are not allowed (TOFF_FALL is ignored). Bit Description Format 7:0 Current sharing ramp-up gain value. Integer Unsigned INDUCTOR (0xD6) Transfer Type: R/W Word Description: Informs the device of circuit’s inductor value. Bit Description Format Unit 15:0 This is used in adaptive algorithm calculations relating to the inductor ripple current. Range Linear μH is 0-100 μH. SNAPSHOT_FAULT_MASK (0xD7) Transfer Type: R/W Word Description: Masking for which faults will trigger a snapshot NVM write. Bit Function Description Value Description 13 Group fault Block fault from when a rail in your fault group has 1 Trigger blocked faulted. 0 Trigger enabled 12 Phase fault Block fault from when a phase in your rail has 1 Trigger blocked faulted. 0 Trigger enabled 11 CPU fault Block general purpose CPU fault. 1 Trigger blocked 0 Trigger enabled 10 CRC fault Block memory CRC fault 1 Trigger blocked 0 Trigger enabled 9 VMON UV fault Block VMON under voltage fault 1 Trigger blocked 0 Trigger enabled 8 VMON OV fault Block VMON over voltage fault 1 Trigger blocked 0 Trigger enabled 7 Iout UC fault Block output under current fault 1 Trigger blocked 0 Trigger enabled 6 Iout OC fault Block output over current fault 1 Trigger blocked 0 Trigger enabled 5 Vin UV fault Block input under voltage fault 1 Trigger blocked 0 Trigger enabled 4 Vin OV fault Block input over voltage fault 1 Trigger blocked www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 58 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Description 0 Trigger enabled 3 UT fault Block under temperature fault 1 Trigger blocked 0 Trigger enabled 2 OT fault Block over temperature fault 1 Trigger blocked 0 Trigger enabled 1 Vout UV fault Block output under voltage fault 1 Trigger blocked 0 Trigger enabled 0 Vout OV fault Block output over voltage fault 1 Trigger blocked 0 Trigger enabled OVUV_CONFIG (0xD8) Transfer Type: R/W Byte Description: Sets output OV/UV control features. Bit Function Description Format 3:0 No Of Limit Value 0-15. Value + 1 consecutive OV or UV violations to initiate a fault Integer Unsigned Violations response. Bit Function Description Value Description 7 Low-Side OV Fault Control of low-side power switch after an Over 0 An OV fault does not Control (Crowbar) Voltage fault. enable the low-side power device. 1 An OV fault enables the low-side power device. XTEMP_SCALE (0xD9) Transfer Type: R/W Word Description: Scale for external temp sensor (not used). Bit Description Format 15:0 The constant is applied to the equation READ_TEMPERATURE_2/3 = ExternalTemperature / Linear XTEMP_SCALE + XTEMP_OFFSET to produce the read value via the PMBus command READ_TEMPERATURE_2/3. XTEMP_OFFSET (0xDA) Transfer Type: R/W Word Description: Offset for external temp sensor (not used). Bit Description Format Unit 15:0 The constant is applied to the equation READ_TEMPERATURE_2/3 = ExternalTemperature / Linear °C XTEMP_SCALE + XTEMP_OFFSET to produce the read value via the PMBus command READ_TEMPERATURE_2/3. M FR_SMBALERT_MASK (0xDB) Transfer Type: R/W Block (7 bytes) Description: Masking of which warning or fault indications that will trigger an assertion of the SALERT signal output. Each byte corresponds to masking of one status command according to: Byte 0: Mask of STATUS_VOUT [7:0] Byte 1: Mask of STATUS_IOUT www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 59 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series [7:0] Byte 2: Mask of STATUS_INPUT [7:0] Byte 3: Mask of STATUS_TEMPERATURE [7:0] Byte 4: Mask of STATUS_CML [7:0] Byte 5: Mask of STATUS_OTHER[7:0] Byte 6: Mask of STATUS_MFR_SPECIFIC [7:0] Bit Function Description Value Description 55 Multi phase init error A phase or phases of a multi-phase current sharing 1 Trigger blocked group did not initialize. 0 Trigger enabled 54 GCB fault An error occurred in GCB communication 1 Trigger blocked 0 Trigger enabled 53 VMON UV warning VMON under voltage warning. The warning limit is 1 Trigger blocked 110% of the configured VMON UV fault limit. 0 Trigger enabled 52 VMON OV warning VMON over voltage warning. The warning limit is 1 Trigger blocked 95% of the configured VMON OV fault limit. 0 Trigger enabled 51 Clock Fail/Loss of External Switching Period Fault (TSW); indicates 1 Trigger blocked sync loss of external SYNC clock. 0 Trigger enabled 50 Rail fault in group One of the rails in your group faulted 1 Trigger blocked 0 Trigger enabled 49 VMON UV fault VMON under voltage fault 1 Trigger blocked 0 Trigger enabled 48 VMON OV fault VMON over voltage fault 1 Trigger blocked 0 Trigger enabled 39 Invalid Or Invalid Or Unsupported Command Received. 1 Trigger blocked Unsupported 0 Trigger enabled Command Received 38 Invalid Or Invalid Or Unsupported Data Received. 1 Trigger blocked Unsupported Data 0 Trigger enabled Received 37 Packet Error Check Packet Error Check Failed. 1 Trigger blocked Failed 0 Trigger enabled 33 Other Communication A PMBus command tried to write to a read-only or 1 Trigger blocked Fault protected command, or a communication fault 0 Trigger enabled other than the ones listed in this table has occurred. 31 Overtemperature Overtemperature Fault. 1 Trigger blocked Fault 0 Trigger enabled 30 Overtemperature Overtemperature Warning. 1 Trigger blocked Warning 0 Trigger enabled 29 Undertemperature Undertemperature Warning. 1 Trigger blocked Warning 0 Trigger enabled 28 Undertemperature Undertemperature Fault. 1 Trigger blocked Fault 0 Trigger enabled 27 Internal Temp Sensor A warning or fault occurred from the internal 1 Trigger blocked Fault temperature sensor. 0 Trigger enabled 26 External Temp A warning or fault occurred from the external 1 Trigger blocked Sensor 0 Fault temperature sensor 0. 0 Trigger enabled 25 External Temp A warning or fault occurred from the external 1 Trigger blocked Sensor 1 Fault temperature sensor 1. 0 Trigger enabled 23 Vin Overvoltage Fault Vin Overvoltage Fault. 1 Trigger blocked 0 Trigger enabled 22 Vin Overvoltage VIN Overvoltage Warning. 1 Trigger blocked www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 60 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Description Warning 0 Trigger enabled 21 Vin Undervoltage Vin Undervoltage Warning. 1 Trigger blocked Warning 0 Trigger enabled 20 Vin Undervoltage Vin Undervoltage Fault. 1 Trigger blocked Fault 0 Trigger enabled 15 Iout Overcurrent Fault Iout Overcurrent Fault. 1 Trigger blocked 0 Trigger enabled 12 Iout Undercurrent Iout Undercurrent Fault. 1 Trigger blocked Fault 0 Trigger enabled 11 Iout fault on Phase 0 Iout fault on Phase 0 1 Trigger blocked 0 Trigger enabled 10 Iout fault on Phase 1 Iout fault on Phase 1 1 Trigger blocked 0 Trigger enabled 7 Vout Overvoltage Vout Overvoltage Fault. 1 Trigger blocked Fault 0 Trigger enabled 4 Vout Undervoltage Vout Undervoltage Fault. 1 Trigger blocked Fault 0 Trigger enabled TEMPCO_CONFIG (0xDC) Transfer Type: R/W Byte Description: Temp correction factor for measured output current. Bit Function Description Format Unit 6:0 Isense Configures the correction factor TC for output current sense. When using Integer x Temperature external temperature sensors, the coefficient applies to both temperature Unsigned 100p Correction sensors. RSEN (DCR) = IOUT_CAL_GAIN x (1 + TC x (T - 25)) where RSEN pm/° = resistance of sense element. C Bit Function Description Value Function Description 7 Temperature Selects the temperature sensor 0 Internal temp Selects the internal temperature correction source for current sense temp sensor sensor. source correction. (To use the external 1 External temp Selects the external temp sensor it must be enabled sensor temperature sensors. in USER_CONFIG). DEADTIME (0xDD) Transfer Type: R/W Word Description: Configures power switch dead times. Bit Function Description Format Unit 15:8 Deadtime H-L Value -10 to 60 ns. Controls the high-side to low-side deadtime value. Integer ns Positive values imply a non-overlap of the FET drive on-times. Negative Signed values imply an overlap of the FET drive on-times. The default value of the maximum deadtime for the adaptive deadtime algorithm is 60ns. Writing a value to this command immediately before writing the DEADTIME_CONFIG command will set a new maximum for the adaptive deadtime algorithm. The device will operate at the deadtime values written to this command when adaptive deadtime is disabled. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 61 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Format Unit 7:0 Deadtime L-H Value -10 to 60 ns. Controls the low-side to high-side deadtime value. Integer ns Positive values imply a non-overlap of the FET drive on-times. Negative Signed values imply an overlap of the FET drive on-times. Writing a value to this command immediately before writing the DEADTIME_CONFIG command will set a new maximum for the adaptive deadtime algorithm. The device will operate at the deadtime values written to this command when adaptive deadtime is disabled. DEADTIME_CONFIG (0xDE) Transfer Type: R/W Word Description: Configures the deadtime optimization mode. Bit Function Description Format Unit 14:8 Min Deadtime Value -5 to 28 ns. Limits the minimum allowed H-to-L deadtime for Integer x 2ns H-L adaptive algorithm to value x 2 ns (signed). Signed 6:0 Min. L-H Value -5 to 28 ns. Limits the minimum allowed L-to-H deadtime for Integer x 2ns Deadtime adaptive algorithm to value x 2ns (signed). Signed Bit Function Description Value Function Description 15 H-L Deadtime Selects adaptive or fixed H-to-L 0 Adaptive Adaptive H-to-L deadtime Mode dead time. control. 1 Freeze Freeze the H-to-L deadtime. 7 L-H Deadtime Selects adaptive or fixed L-to-H 0 Adaptive Adaptive L-to-H deadtime Mode dead time. control. 1 Freeze Freeze the L-to-H deadtime. ASCR_CONFIG (0xDF) Transfer Type: R/W Block (4 bytes) Description: Control loop settings Bit Function Description Format 23:16 ASCR Residual Residual factor Integer Unsigned 15:0 ASCR Gain Gain factor Integer Unsigned Bit Function Description Value Description 24 ASCR Enable Enable or disable the ASCR function. 1 ASCR enabled 0 ASCR disabled SEQUENCE (0xE0) Transfer Type: R/W Word Description: The device will enable its output when its CTRL or OPERATION enable state, as defined by ON_OFF_CONFIG, is set and the prequel device has issued a Power-Good event on the GCB bus. The device will disable its output (using the programmed delay values) when the sequel device has issued a Power-Down event on the GCB bus. The data field is a two-byte value. The most- significant byte contains the 5-bit Rail GCB ID of the prequel device. The least-significant byte contains the 5-bit Rail GCB ID of the sequel device. The most significant bit of each byte contains the enable of the prequel or sequel mode. Bit Function Description Format www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 62 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Format 12:8 Prequel Rail Value 0-31. Set to the Rail GCB ID of the rail that should precede this Integer Unsigned GCB ID device’s rail in a sequence order. 4:0 Sequel Rail Value 0-31. Set to the Rail GCB ID of the rail that should follow this Integer Unsigned GCB ID device’s rail in a sequence order. Bit Function Description Value Description 15 Prequel Enable Prequel Enable/Disable. 0 Disable, no prequel preceding this rail. 1 Enable, prequel to this rail is defined by bits 12:8. 7 Sequel Enable Sequel Enable/Disable. 0 Disable, no sequel following this rail. 1 Enable, sequel to this rail is defined by bits 4:0. TRACK_CONFIG (0xE1) Transfer Type: R/W Byte Description: Configures the voltage tracking modes of the device Bit Function Description Value Function Description 7 Enable Voltage Enables voltage tracking. 0 Tracking is disabled. Tracking 1 Tracking is enabled. 2 Upper Controls upper tracking ratio. 0 Output Tracks Output tracks 100% of VTRK. Tracking Ratio 100% Of VTRK 1 Output Tracks Output tracks 50% of VTRK. 50% Of VTRK 1 Upper Track Controls upper track limit. 0 Limited By Output is limited by target Limit Target Voltage voltage. 1 Limited By Output is limited by VTRK pin. VTRK GCB_GROUP (0xE2) Transfer Type: R/W Block (4 bytes) Description: Rails (output voltages) are assigned group numbers in order to share specific behaviours. The GCB_GROUP configures fault spreading group ID and enable, broadcast OPERATION group ID and enable, and broadcast VOUT_COMMAND group ID and enable. Note that GCB Groups are separate and unique from GCB Phases. Current sharing rails need to be in the same DDC Group in order to respond to broadcast VOUT_COMMAND and OPERATION commands. Power fail event responses are automatically spread in current sharing rails when they are configured using GCB_CONFIG, regardless of their setting in GCB_GROUP. Bit Function Description Format 31:24 Dummy Not used. Integer Unsigned 20:16 Broadcast Group ID (0-31) sent as data for broadcast VOUT_COMMAND command Integer Unsigned VOUT_COMM events. AND Group ID 12:8 Broadcast Group ID (0-31) sent as data for broadcast OPERATION command events. Integer Unsigned OPERATION Group ID www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 63 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Format 4:0 Power Fail Group ID (0-31) sent as data for broadcast power fail events. Integer Unsigned Group ID Bit Function Description Value Function Description 21 Broadcast Controls how the device should 0 Ignore events Ignores broadcast VOUT_COMM respond to a received broadcast VOUT_COMMAND command AND Response VOUT_COMMAND command events. event. 1 Respond to Respond to broadcast events VOUT_COMMAND command events with same Broadcast VOUT_COMMAND Group ID. 13 Broadcast Controls how the device should 0 Ignore events Ignores broadcast OPERATION OPERATION respond to a received broadcast command events. Response OPERATION command event. 1 Respond to Respond to broadcast events OPERATION command events with same Broadcast Enable Group ID. 5 Power Fail Controls how the device should 0 Sequenced Responds to power fail events Response respond to a received broadcast Shutdown with same Power Fail Group ID power fail event. with sequenced shutdown. 1 Immediate Responds to power fail events Shutdown with same Power Fail Group ID by shutting down immediately. READ_IOUT1 (0xE3) Transfer Type: Read Word Description: Returns the measured output current of phase 1. Bit Description Format Unit 15:0 Returns the output current reading of phase 1. Linear A DEVICE_ID (0xE4) Transfer Type: Read Block (16 bytes) Description: Returns the 16-byte (character) device identifier string. Bit Description Format 15:0 Returns the 16-byte (character) device identifier string. ASCII MFR_IOUT_OC_FAULT_RESPONSE (0xE5) Transfer Type: R/W Byte Description: Configures the output overcurrent fault response. The command format is the same as the PMBus standard responses for voltage and temperature faults except that it sets the overcurrent status bit. Bit Function Description Value Function Description www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 64 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms 100 175 ms 101 210 ms 110 245 ms 111 280 ms MFR_IOUT_UC_FAULT_RESPONSE (0xE6) Transfer Type: R/W Byte Description: Configures the output undercurrent fault response. The command format is the same as the PMBus standard responses for voltage and temperature faults except that it sets the undercurrent status bit. Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 65 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Function Description 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms 100 175 ms 101 210 ms 110 245 ms 111 280 ms IOUT_AVG_OC_FAULT_LIMIT (0xE7) Transfer Type: R/W Word Description: Sets the IOUT average overcurrent fault threshold for each phase. For down-slope sensing, this corresponds to the average of all the current samples taken during the (1-D) time interval, excluding the Current Sense Blanking time (which occurs at the beginning of the 1-D interval). For up-slope sensing, this corresponds to the average of all the current samples taken during the D time interval, excluding the Current Sense Blanking time (which occurs at the beginning of the D interval). This feature shares the OC fault bit operation (in STATUS_IOUT) and OC fault response with IOUT_OC_FAULT_LIMIT. Bit Description Format Unit 15:0 Sets the IOUT average overcurrent fault threshold for each phase. Thus, the effective fault Linear A threshold will be twice the value of this command. IOUT_AVG_UC_FAULT_LIMIT (0xE8) Transfer Type: R/W Word Description: Sets the IOUT average undercurrent fault threshold for each phase. For down-slope sensing, this corresponds to the average of all the current samples taken during the (1-D) time interval, excluding the Current Sense Blanking time (which occurs at the beginning of the 1-D interval). For up-slope sensing, this corresponds to the average of all the current samples taken during the D time interval, excluding the Current Sense Blanking time (which occurs at the beginning of the D interval). This feature shares the UC fault bit operation (in STATUS_IOUT) and UC fault response with IOUT_UC_FAULT_LIMIT. Bit Description Format Unit 15:0 Sets the IOUT average undercurrent fault threshold for each phase. Thus, the effective fault Linear A threshold will be twice the value of this command. MFR_USER_CONFIG (0xE9) Transfer Type: R/W Word Description: This command is used to set options for output voltage sensing, maximum output voltage override, SMBus timeout, and GCB and SYNC output configurations. Bit Function Description Value Function Description 15 Dummy Not used 0 Dummy 1 Dummy 6 GCB Output Configures how the GCB pin is 0 Open drain GCB output is open-drain. Control used. 1 Push-pull GCB output is push-pull. 4 SMBus Enables or disables SMBus time- 0 SMBus time-outs enabled. Timeout outs. 1 SMBus time-outs disabled. Enable 2:1 Sync IO Configures how the SYNC pin is 00 SYNC pin not The internal clock is used for Control used used regulator's switching. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 66 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Function Description 01 SYNC pin as The internal clock is output on output the SYNC pin, while also being used for regulator's switching. 10 SYNC pin as An external clock on the SYNC input pin is used for regulator's switching. SNAPSHOT (0xEA) Transfer Type: Read Block (32 bytes) Description: The SNAPSHOT command is a 32-byte read-back of parametric and status values. It allows monitoring and status data to be stored to NVM either during a fault condition or via SNAPSHOT_CONTROL command. Snapshot is continuously updated in RAM (also when the output is disabled) and can be read using the SNAPSHOT command. When a fault occurs, and that fault is not masked off by the SNAPSHOT_MASK command, the update of snapshot in RAM is stopped and the latest snapshot in RAM is stored to NVM. That snapshot data can then be read back by reading SNAPSHOT command, also after input voltage has been cycled. By checking the Flash Memory Status bits [183:176] in SNAPSHOT one can tell whether snapshot data is from NVM (due to a fault) or not. [183:176] = 0 means data is from NVM (and the continuous update in RAM is stopped), while [183:176] = 255 means the continuous update of snapshot in RAM is ongoing. Bit Function Description Format 28:27 Load Current Load current of phase 1. Linear of phase 1 26:25 Load Current Load current of phase 0. Linear of phase 0 24:23 External External temperature2. Linear Temperature2 22 NVM status Value 0 : Snapshot data is from NVM and the continuous update in RAM is Integer Unsigned stopped (snapshot disabled) Value 255 : Continuous update of snapshot in RAM is ongoing (snapshot enabled) 21 Manufacturer Manufacturer specific status byte. Integer Unsigned Specific Status Byte 20 Status CML Status CML. Integer Unsigned 19 Status Status temperature. Integer Unsigned Temperature 18 Status Vin Status Vin. Integer Unsigned 17 Status Iout Status iout. Integer Unsigned 16 Status Vout Status vout. Integer Unsigned 15:14 Switching Switching frequency. Linear Frequency 13:12 External External Temperature1 Linear Temperature1 11:10 Internal Internal temperature. Linear Temperature 9:8 Duty Cycle Duty cycle. Linear 7:6 Peak Current Peal current. Linear 5:4 Load Current Load current. Linear 3:2 Output Voltage Output voltage. Vout Mode Unsigned 1:0 Input Voltage Input voltage. Linear www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 67 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series BLANK_PARAMS (0xEB) Transfer Type: Read Block (16 bytes) Description: Returns a 16-byte string which indicates which parameter values were either retrieved by the last RESTORE operation or have been written since that time. Reading BLANK_PARAMS immediately after a restore operation allows the user to determine which parameters are stored in that store. A one indicates the parameter is not present in the store and has not been written since the RESTORE operation. Bit Description Format 15:0 Byte Array LEGACY_FAULT_GROUP (0xF0) Transfer Type: R/W Block (4 bytes) Description: This command allows the product to fault spread with other OKDx products with different definition of the GCB_GROUP command. The command sets which rail GCB IDs should be listened to for fault spreading information. The data sent is a 4-byte, 32-bit, bit vector where every bit represents a rail’s GCB ID. A bit set to 1 indicates a device GCB ID to which the configured device will respond upon receiving a fault spreading event. In this vector, bit 0 of byte 0 corresponds to the rail with GCB ID 0. Following through, Bit 7 of byte 3 corresponds to the rail with GCB ID 31. NOTE: The rail’s own GCB ID should not be set within the LEGACY_FAULT_GROUP command for that device/rail. All products in a current share rail must shutdown for the rail to report a shutdown. If fault spread mode is enabled in USER_CONFIG, the device will immediately shut down if one of its GCB_GROUP members fail. The rail will attempt its configured restart only after all devices/rails within the GCB_GROUP have cleared their faults. If fault spread mode is disabled in USER_CONFIG, the device will perform a sequenced shutdown as defined by the SEQUENCE command setting. The rails/devices in a sequencing set only attempt their configured restart after all faults have cleared within the GCB_GROUP. If fault spread mode is disabled and sequencing is also disabled, the device will ignore faults from other devices and stay enabled. Bit Description Format 31:0 Byte Array READ_IOUT0 (0xF2) Transfer Type: Read Word Description: Returns the measured output current of phase 0. Bit Description Format Unit 15:0 Returns the output current reading of phase 0. Linear A SNAPSHOT_CONTROL (0xF3) Transfer Type: R/W Byte Description: Used to erase snapshot data in NVM or copy snapshot data between RAM and NVM. Note: It is advised that these operations be performed while the output voltage is disabled. Bit Description Value Function Description 0 Used to perform memory operations of snapshot 0x01 Copy NVM to Causes the current SNAPSHOT data. Note: It is advised that this operation be RAM values in NVM to be copied to performed while the output voltage is disabled. RAM. 0x02 Store RAM to Causes the values to be stored NVM. in set location in NVM memory. 0x03 Erase in NVM Erase the snapshot data from NVM. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 68 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series MFR_VMON_OV_FAULT_LIMIT (0xF5) Transfer Type: R/W Word Description: Sets the VMON overvoltage fault threshold. The VMON input is used to measure the highest temperature of the power stages. The VMON overvoltage warn limit is automatically set to 95% of this fault value. Bit Description Format Unit 15:0 Sets the VMON overvoltage fault threshold. Linear V MFR_VMON_UV_FAULT_LIMIT (0xF6) Transfer Type: R/W Word Description: Sets the VMON undervoltage fault threshold. The VMON input is used to measure the highest temperature of the power stages. The VMON undervoltage warn limit is automatically set to 110% of this fault value. Bit Description Format Unit 15:0 Sets the VMON undervoltage fault threshold. Linear V MFR_READ_VMON (0xF7) Transfer Type: Read Word Description: Returns the VMON voltage reading, which is proportional to the highest temperature in the power stages according to T = 92.5 * VMON - 255. Bit Description Format Unit 15:0 Returns the VMON voltage reading. Linear V VMON_OV_FAULT_RESPONSE (0xF8) Transfer Type: R/W Byte Description: Sets the VMON overvoltage fault response. Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 69 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series Bit Function Description Value Function Description 100 175 ms 101 210 ms 110 245 ms 111 280 ms VMON_UV_FAULT_RESPONSE (0xF9) Transfer Type: R/W Byte Description: Sets the VMON undervoltage fault response. Bit Function Description Value Function Description 7:6 Response Describes the device interruption 10 Disable and Disable the output without delay operation. For all modes set by Retry and retry according to the bits [7:6], the device pulls setting in bits [5:3]. SALERT low and sets the related fault bit in the status registers. 5:3 Retry Setting The device attempts to restart the 000 Do Not Retry A zero value for the Retry number of times set by these Setting means that the unit bits. does not attempt to restart. The output remains disabled until the fault is cleared. 111 Retry The PMBus device attempts to Continuously restart continuously, without limitation, until output is DISABLED, bias power is removed, or another fault condition causes the output to shut down. 2:0 Retry Time Retry delay time = (Value +1) * 000 35 ms 35 ms. Sets the time between 001 70 ms retries in 35 ms increments. 010 105 ms Range is 35 ms to 280 ms. 011 140 ms 100 175 ms 101 210 ms 110 245 ms 111 280 ms SECURITY_LEVEL (0xFA) Transfer Type: Read Byte Description: Returns the current security level. The device provides write protection for individual commands. Each bit in the UNPROTECT parameter controls whether its corresponding command is writable (commands are always readable). If a command is not writable, a password must be entered in order to change its parameter (i.e., to enable writes to that command). There are two types of passwords, public and private. The public password provides a simple lock-and-key protection against accidental changes to the device. It would typically be sent to the device in the application prior to making changes. Private passwords allow commands marked as non-writable in the UNPROTECT parameter to be changed. Private passwords are intended for protecting Default-installed configurations and would not typically be used in the application. Each store (USER and DEFAULT) can have its own UNPROTECT string and private password. If a command is marked as non-writable in the DEFAULT UNPROTECT parameter (its corresponding bit is cleared), the private password in the DEFAULT Store must be sent in order to change that command. If a www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 70 of 71 OKDx-T/90-W12-xxx-C 90A Digital PoL DC-DC Converter Series command is writable according to the Default UNPROTECT parameter, it may still be marked as non-writable in the User Store UNPROTECT parameter. In this case, the User private password can be sent to make the command writable. Bit Description Value Function Description 7:0 The device provides write protection for individual 0x03 Level 3 Security Level 3 – Module commands. Vendor. 0x02 Level 2 Security Level 2 – User. 0x01 Level 1 Security Level 1 – Public. 0x00 Level 0 Security Level 0 - Unprotected. PRIVATE_PASSWORD (0xFB) Transfer Type: R/W Block (9 bytes) Description: Sets the private password string for the USER_STORE. Password strings have the same format as the MFR_ID parameters. Bit Description Format 8:0 Sets the private password string for the USER_STORE. ASCII PUBLIC_PASSWORD (0xFC) Transfer Type: R/W Block (4 bytes) Description: Sends a password to the device. Bit Description Format 3:0 Sets the public password string. ASCII UNPROTECT (0xFD) Transfer Type: R/W Block (32 bytes) Description: Sets a 256-bit (32-byte) parameter which identifies which commands are to be protected against write-access at lower security levels. Each bit in this parameter corresponds to a command according to the command’s code. The command with a code of 00h (PAGE) is protected by the least-significant bit of the least-significant byte, followed by the command with a code of 01h and so forth. Note that all possible commands have a corresponding bit regardless of whether they are protectable or supported by the device. Clearing a command’s UNPROTECT bit indicates that write-access to that command is only allowed if the device’s security level has been raised to an appropriate level. The UNPROTECT bits in the DEFAULT store require a security level 3 or greater to be writeable. The UNPROTECT bits in the USER store require a security level of 2 or higher. Bit Description Format 31:0 Byte Array This product is subject to the following operating requirements Murata Power Solutions, Inc. and the Life and Safety Critical Application Sales Policy: 11 Cabot Boulevard, Mansfield, MA 02048-1151 U.S.A. Refer to: http://www.murata-ps.com/requirements/ ISO 9001 and 14001 REGISTERED Murata Power Solutions, Inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. © 2016 Murata Power Solutions, Inc. www.murata-ps.com/support MDC_OKDx-T/90-W12-xxx-C.A02 Page 71 of 71
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