ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters PRODUCT OVERVIEW DATEL's ADS-118 and ADS-118A are 12-bit, and error-correction circuitry. All timing and control 5MHz, sampling A/D converters packaged in logic operates from the rising edge of a single start space-saving 24-pin DDIP’s. The ADS-118 offers convert pulse. Digital input and output levels are an input range of ±1V and has three-state outputs. TTL. Models are available for use in either com- The ADS-118A has an input range of ±1.25V and mercial (0 to +70°C) or military (–55 to +125°C) features direct adjustment of offset error. operating temperature ranges. These functionally complete low-power devices Applications include radar, transient signal (1.8 Watts) contain an internal fast-settling sample/ analysis, process control, medical/graphic imaging, FEATURES hold amplifi er, a 12-bit subranging A/D converter, and FFT spectrum analysis. � a precise voltage reference, timing/control logic, 12-bit resolution � INPUT/OUTPUT CONNECTIONS 5MHz minimum sampling rate PIN FUNCTION PIN FUNCTION � Functionally complete 1 BIT 12 (LSB) 24 NO CONNECTION � Small 24-pin DDIP 2 BIT 11 23 ANALOG GROUND � 3 BIT 10 22 NO CONNECTION Requires only ±5V supplies 4 BIT 9 21 +5V ANALOG SUPPLY � Low-power, 1.8 Watts 5 BIT 8 20 –5V SUPPLY � Outstanding dynamic performance 6 BIT 7 19 ANALOG INPUT 7 BIT 6 18 ANALOG GROUND � No missing codes over full military temperature 8 BIT 5 17* ENABLE/OFFSET ADJ. range 9 BIT 4 16 START CONVERT � Edge-triggered, no pipeline delay 10 BIT 3 15 EOC � Ideal for both time and frequency-domain 11 BIT 2 14 DIGITAL GROUND applications 12 BIT 1 (MSB) 13 +5V DIGITAL SUPPLY * ADS-118, Pin 17 is ENABLE ADS-118A, Pin 17 is OFFSET ADJUST BLOCK DIAGRAM OFFSET ADJUST 17 17 ENABLE (ADS-118A only) (ADS-118A only) BUFFER ANALOG INPUT 19 – 12 BIT 1 (MSB) S/H FLASH + 11 BIT 2 ADC 10 BIT 3 1 9 BIT 4 8 BIT 5 REF 7 BIT 6 DAC 6 BIT 7 � 5 BIT 9 4 BIT 9 3 BIT 10 FLASH 2 BIT 11 ADC 1 BIT 12 (LSB) 2 AMP START CONVERT 16 TIMING AND CONTROL LOGIC EOC 15 21 13 14 20 18, 23 22, 24 +5V ANALOG +5V DIGITAL DIGITAL –5V SUPPLY ANALOG NO CONNECT SUPPLY SUPPLY GROUND GROUND Figure 1. ADS-118/118A Functional Block Diagram DATEL, Inc. 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com 26 Jun 2015 ADS-118.B05 Page 1 of 9 REGISTER REGISTER DIGITAL CORRECTION LOGIC 3-STATE OUTPUT REGISTER ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters ABSOLUTE MAXIMUM RATINGS PHYSICAL/ENVIRONMENTAL PARAMETERS LIMITS UNITS PARAMETERS MIN. TYP. MAX. UNITS +5V Supply (Pins 13, 21) 0 to +6 Volts Operating Temp. Range, Case –5V Supply (Pin 20) 0 to –6 Volts ADS-118/118AMC 0 — +70 °C Digital Input (Pin 16, 17) –0.3 to +VDD +0.3 Volts ADS-118/118AMM, GM, 883 –55 — +125 °C Analog Input (Pin 19) ±5 Volts Thermal Impedance Lead Temperature (10 seconds) +300 °C θjc — 2 — °C/Watt θca — 23 — °C/Watt Storage Temperature Range –65 — +150 °C Package Type 24-pin, metal-sealed, ceramic DDIP or SMT Weight 0.42 ounces (12 grams) FUNCTIONAL SPECIFICATIONS (TA = +25°C, ±VDD = ±5V, 5MHz sampling rate, and a minimum 3 minute warmup ➀ unless otherwise specifi ed.) +25°C 0 TO +70°C –55 TO +125°C ANALOG INPUT MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS Input Voltage Range, ADS-118 ➁ — ±1 — — ±1 — — ±1 — Volts Input Resistance 475 500 — 475 500 — 475 500 — Ω Input Capacitance — 6 15 — 6 15 — 6 15 pF DIGITAL INPUT Logic Levels Logic "1" +2.0 — — +2.0 — — +2.0 — — Volts Logic "0" — — +0.8 — — +0.8 — — +0.8 Volts Logic Loading "1" — — +20 — — +20 — — +20 μA Logic Loading "0" — — –20 — — –20 — — –20 μA Start Convert Positive Pulse Width ➂ 50 100 — 50 100 — 50 100 — ns STATIC PERFORMANCE Resolution — 12 — — 12 — — 12 — Bits Integral Nonlinearity (fin = 10kHz) — ±0.75 — — ±1.0 — — ±1.5 — LSB Differential Nonlinearity (fin = 10kHz) — ±0.5 +0.75 — ±0.5 ±0.95 — ±0.75 +0.95 LSB Full Scale Absolute Accuracy — ±0.1 ±0.5 — ±0.5 ±0.75 — ±0.75 ±1.5 %FSR Bipolar Zero Error (Tech Note 2) — ±0.1 ±0.5 — ±0.5 ±0.85 — ±0.85 ±2.0 %FSR Bipolar Offset Error (Tech Note 2) — ±0.1 ±0.5 — ±0.5 ±1.5 — ±1.5 ±2.5 %FSR Gain Error (Tech Note 2) — ±0.1 ±0.5 — ±0.5 ±1.0 — ±1.0 ±2.5 % No Missing Codes (fin = 10kHz) 12 — — 12 — — 12 — — Bits DYNAMIC PERFORMANCE Peak Harmonics (–0.5dB) dc to 500kHz — –76 –71 — –74 –70 — –72 –66 dB 500kHz to 1MHz — –75 –71 — –74 –70 — –70 –65 dB 1MHz to 2.5MHz — –69 –69 — –73 –67 — –66 –60 dB Total Harmonic Distortion (–0.5dB) dc to 500kHz — –72 –68 — –71 –67 — –70 –65 dB 500kHz to 1MHz — –71 –67 — –70 –66 — –67 –63 dB 1MHz to 2.5MHz — –70 –66 — –69 –65 — –66 –60 dB Signal-to-Noise Ratio (w/o distortion, –0.5dB) dc to 500kHz 67 69 — 66 69 — 64 67 — dB 500kHz to 1MHz 66 69 — 65 68 — 63 66 — dB 1MHz to 2.5MHz 66 69 — 65 68 — 63 66 — dB Signal-to-Noise Ratio ➃ (& distortion, –0.5dB) dc to 500kHz 65 68 — 64 67 — 62 66 — dB 500kHz to 1MHz 65 68 — 64 67 — 61 65 — dB 1MHz to 2.5MHz 64 67 — 63 66 — 60 64 — dB Noise — 195 — — 195 — — 195 — μVrms Two-tone Intermodulation Distortion (fin = 1MHz, 975kHz, fs = 5MHz, –0.5dB) — –74 — — –74 — — –74 — dB Input Bandwidth (–3dB) Small Signal (–20dB input) — 20 — — 20 — — 20 — MHz Large Signal (–0.5dB input) — 10 — — 10 — — 10 — MHz Feedthrough Rejection (fin = 2.5MHz) — 80 — — 80 — — 80 — dB Slew Rate — ±400 — — ±400 — — ±400 — V/μs Aperture Delay Time — +10 — — +10 — — +10 — ns Aperture Uncertainty — 3 — — 3 — — 3 — ps rms DATEL, Inc. 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com 26 Jun 2015 ADS-118.B05 Page 2 of 9 ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters +25°C 0 to +70°C –55 to +125°C DYNAMIC PERFORMANCE (Cont.) MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS S/H Acquisition Time ( to ±0.001%FSR, 10V step) — 85 90 — 85 90 — 85 90 ns Overvoltage Recovery Time ➄ — 200 — — 200 — — 200 — ns A/D Conversion Rate 5 — — 5 — — 5 — — MHz DIGITAL OUTPUTS Logic Levels Logic "1" +2.4 — — +2.4 — — +2.4 — — Volts Logic "0" — — +0.4 — — +0.4 — — +0.4 Volts Logic Loading "1" — — –4 — — –4 — — –4 mA Logic Loading "0" — — +4 — — +4 — — +4 mA Delay, Falling Edge of EOC to Output Data Valid — — 20 — — 20 — — 20 MHz Delay, Falling Edge of ENABLE to Output Data Valid — — 10 — — 10 — — 10 MHz Output Coding Offset Binary POWER REQUIREMENTS Power Supply Ranges ➅ +5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.9 +5.0 +5.25 Volts –5V Supply –4.75 –5.0 –5.25 –4.75 –5.0 –5.25 –4.9 –5.0 –5.25 Volts Power Supply Currents +5V Supply — +205 +220 — +205 +220 — +205 +220 mA –5V Supply — –180 –205 — –180 –205 — –180 –205 mA Power Dissipation — 1.8 2.1 — 1.8 2.1 — 1.8 2.1 Watts Power Supply Rejection — — ±0.1 — — ±0.1 — — ±0.1 %FSR/%V Footnotes: ➃ Effective bits is equal to: ➀ All power supplies should be on before applying a start convert pulse. All supplies Full Scale Amplitude (SNR + Distortion) – 1.76 + 20 log and the clock (start convert pulses) must be present during warmup periods. The Actual Input Amplitude device must be continuously converting during this time. 6.02 ➁ Input voltage ranges for ADS-118A is ±1.25V ➄ This is the time required before the A/D output data is valid once the analog input is ➂ A 100ns wide start convert pulse is used for all production testing. For applications back within the speciŢ ed range. requiring less than an 5MHz sampling rate, wider start convert pulses can be used. NOTE: The device only requires the rising edge of a start convert pulse to operate. ➅ The minimum supply voltages of +4.9V and –4.9V for ±VDD are required for –55°C operation only. The minimum limits are +4.75V and –4.75V when operating at +125°C TECHNICAL NOTES 1. Obtaining fully specifi ed performance from the ADS-118 requires careful errors can be reduced to zero using the adjustment circuitry shown in attention to pc-card layout and power supply decoupling. The device’s Figures 2a and 2b. For operation without adjustment, tie pin 17 to analog analog and digital ground systems are connected to each other internally. ground. When using this circuitry, or any similar offset and gain-calibration For optimal performance, tie all ground pins (14, 18, and 23) directly to a hardware, make adjustments following warmup. To avoid interaction, large analog ground plane beneath the package. always adjust offset before gain. Bypass all power supplies to ground with 4.7μF tantalum capacitors in 3. To enable the three-state outputs, connect ENABLE (pin 17) to a logic parallel with 0.1μF ceramic capacitors. Locate the bypass capacitors as "0" (low). To disable, connect pin 17 to logic "1" (high). The three-state close to the unit as possible. outputs are permanently enabled in the ADS-118A. 2. The ADS-118 achieves its specifi ed accuracies without the need for 4. Applying a start convert pulse while a conversion is in progress (EOC = external calibration. If required, the device’s small initial offset and gain logic "1") will initiate a new and inaccurate conversion cycle. DATEL, Inc. 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com 26 Jun 2015 ADS-118.B05 Page 3 of 9 ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters CALIBRATION PROCEDURE Any offset and/or gain calibration procedures should not be implemented Zero/Offset Adjust Procedure until devices are fully warmed up. To avoid interaction, offset must be ad- 1. Apply a train of pulses to the START CONVERT input (pin 16) so the con- justed before gain. The ranges of adjustment for the circuits in Figures 2a verter is continuously converting. and 2b are guaranteed to compensate for the ADS-118's initial accuracy errors and may not be able to compensate for additional system errors. 2. Apply +244μV (ADS-118) or +305μV (ADS-118A) to the ANALOG INPUT (pin 19). A/D converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. This can be 3. Adjust the offset potentiometer until the output bits are 1000 0000 00000 accomplished by connecting and the LSB fl ickers between 0 and 1. LED’s to the digital outputs and adjusting until certain LED's "fl icker" Gain Adjust Procedure equally between on and off. Other approaches employ digital comparators 1. Apply +0.99927V (ADS-118) or +1.249085V (ADS-118A) to the ANALOG or microcontrollers to detect when the outputs change from one code to INPUT (pin 19). the next. 2. Adjust the gain potentiometer until all output bits are 1's and the LSB For the ADS-118, offset adjusting is normally accomplished at the point fl ickers between 1 and 0. where the MSB is a 1 and all other output bits are 0’s and the LSB just changes from a 0 to a 1. This digital output transition ideally occurs when 3. To confi rm proper operation of the device, vary the input signal to obtain the applied analog input is the output coding listed in Table 1. +½LSB (+244μV for ADS-118; +305μV for ADS-118A). Gain adjusting is accomplished when all bits are 1’s and the LSB just changes from a 1 to a 0. This transition ideally occurs when the ana- log input is at +full scale minus 1½ LSB's (+0.99927V for ADS-118; +1.249085V for ADS-118A). Table 1. Output Coding for Bipolar Operation OUTPUT CODING ADS-118 INPUT ADS-118 INPUT BIPOLAR SCALE OFFSET BINARY RANGE (±1V) RANGE (±1.25V) MSB LSB +FS –1 LSB +0.99951V 1111 1111 1111 +1.2494V +3/4 FS +0.75000V 1110 0000 0000 +0.9375V +1/2 FS +0.50000V 1100 0000 0000 +0.6250V 0 0.00000V 1000 0000 0000 0.0000V –1/2 FS –0.50000V 0100 0000 0000 –0.6250V –3/4 FS –0.75000V 0010 0000 0000 –0.9375V –FS +1 LSB –0.99951V 0000 0000 0001 –1.2494V –FS –1.00000V 0000 0000 0000 –1.2500V +15V GAIN ADJUST 20kΩ 1.2MΩ 2kΩ ZERO/ OFFSET SIGNAL To Pin19 ADJUST INPUT of ADS-118A GAIN 50Ω ADJUST –15V +15V Potentiometer is at 25Ω during the device's factory trim procedure. 1.98kΩ SIGNAL +15V (or +5V) INPUT 50Ω To Pin19 20kΩ ZERO/ of ADS-118 To Pin17 OFFSET of ADS-118A ADJUST –15V –15V (or –5V) Figure 2a. Optional ADS-118 External Figure 2b. Optional ADS-118A Gain and Offset Adjust Circuits Gain and Offset Adjust Circuits DATEL, Inc. 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com 26 Jun 2015 ADS-118.B05 Page 4 of 9 ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters �- �# 5"����67�58 �� 5"��# -�3A9 ���A9 � �� 5"��$ +% �$,�#� 1 5"��- 0 5"��% #� B% 3 5"��4 ������� 4 5"��3 -�3A9 �������� ���A9 % 5"��0 �0,�#$ - 5"��1 $ 5"���� ���!�; # 5"���� �1 "���� � 5"���#�6!�58 �% (�’ ���&� �4 �3 (��5!(�6���#8 ’�� (&� ����99�(����:��� � �����<���+% ��/������=�/���>��/����?���>��=��=��+% ������<�����+% ���<������ "?�����������/�����������/���,��=����??�������>��@�����=���@�������������������� � Figure 3. Typical Connection Diagram � �+� ���&� ���������� ’�� (&� ��������� ��./������������ *��� "��(&��!��)* 0%������� 1�������� $%�������,�-��������,�%�������� $���,�2%�� (�’ ’�������������� �-��������,��%�������� #�������� ������ ��������� �!"� ������� �!"� ���� �$�������� "� �!"������ "� �!"������ �%�������� %�������� ������������������������������������������������ 3�������� Figure 4. ADS-118/118A Timing Diagram DATEL, Inc. 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com 26 Jun 2015 ADS-118.B05 Page 5 of 9 + + ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters THERMAL REQUIREMENTS Electrically-insulating, thermally-conductive "pads" may be installed All DATEL sampling A/D converters are fully characterized and specifi ed underneath the package. Devices should be soldered to boards rather than over operating temperature (case) ranges of socketed, and of course, minimal air fl ow over the surface can greatly help 0 to +70°C and –55 to +125°C. All room temperature reduce the package temperature. (TA = +25°C) production testing is performed without the use of heat sinks or forced air cooling. Thermal impedance fi gures for each device In more severe ambient conditions, the package/junction temperature of a are listed in their respective specifi cation tables. given device can be reduced dramatically (typically 35%) by using one of DATEL's HS Series heat sinks. See Ordering Information for the assigned These devices do not normally require heat sinks, however, standard part number. See page 1-183 of the DATEL Data Acquisition Components precautionary design and layout procedures should be used to ensure Catalog for more information on the HS Series. Request DATEL Application devices do not overheat. The ground and power planes beneath the Note AN8, "Heat Sinks for DIP Data Converters", package, as well as all pcb signal runs to and from the device, should be or contact DATEL directly, for additional information. as heavy as possible to help conduct heat away from the package. 0 +0.67 –10 –20 –30 0 –40 –50 –60 –0.47 0 4096 –70 Digital Output Code –80 –90 –100 –110 –120 –130 0 250 500 750 1 1.25 1.5 1.75 2 2.25 2.5 kHz kHz kHz MHz MHz MHz MHz MHz MHz MHz Frequency 0 4096 (fs = 5MHz, fin = 2.45MHz, Vin = –0.5dB, 4,096-point FFT) Digital Output Code Figure 6. ADS-118 Histogram and Differential Nonlinearity Figure 5. FFT Analysis of ADS-118 DATEL, Inc. 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com 26 Jun 2015 ADS-118.B05 Page 6 of 9 Amplitude Relative to Full Scale (dB) Number of Occurences DNL (LSB's) ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters DATEL, Inc. 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com 26 Jun 2015 ADS-118.B05 Page 7 of 9 ���� �� �����. ���� "� � ���"� ��’������’����"-���’��������& ��� � ���� ’’’���’��������"�’�"�’��� ��� �����"� � "� � ’’’�� ��’�"�’��� ����� ��� ��� ’’’���’"������"�’�"�’��’���� ��� � � ����� ��’��’��’������(’��*���’��!�� �������� ’’’!��-���’�����’�-�’������� �� �������� � � �� ��� �& �% �� �� ���� "� ��� � �� �� ����� �& �% �� �� �� � �� � ��"’�&� ���+����’���, � *� �& �% �� �� )�"� � ��"’�&� ���’����, ���� ���� � � �� !� �& �% �� #��!$ �� � � !� �� �&� ���+��� �� ��� ��� �& �% �� �� ��� �� �� � �� !� ���& !� �& �% �� �� ��� "� �� �� ��� !� &��& !� �& �% �� �� "� ���� �� �� �� ��� !� ����� � �� ������ ��� �"�� !� �& �% �� �� )�"� ��� �� �� � � �� �� � � � ����� !� �� �� � ���� ��� ���’����’� �� � � ���� � � "� !� �� ���� ���� ��� ��� ���� )�"� �� � � !� �� ���’����’� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� ����� �� � ��� ���� ���� ������ ��� ���� !� )�"� � ����� ���� ���� ��� �� � ��� "� !� ���!��’ ��� � � ��� �������� ��� ������ �� �� � ��� � �� !� � �� !� ��� ��� ��� �� �& �% �� �� �� � �� ���& !�� � �� !� ��� �& �% �� �� ������ �� � � )�"� ���& !�� � �� !� ����� �& �% �� �� � � �� � �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� �� ���’ !�� � �� !� ��( ����� � �& �% �� �� � � ���� � !�� �� �� �& �% �� � �� ��� �� ����� � �� !�� ����� �� ���� �& �% � � ��� � � ���� ����� ��� !�� ����� �& �% � #��!$ � ��� �� �� ������ �� �� ����� �� � �& �% � � � )�"� �� � ��� � �� � �� ����� �� �� � � ���� � � �� ��� �� �� �� � ������� ������ � ����� � �� ��� ����� �� �� ��� �� �� ������ ����� �� �� ��� �� ����� ������� ��� �� �� �� ���� � ������ ����� ����� � �� �� �� �� �� �� ������ ����� �� �� �� �� �� �� � ����� � �� ��� �� �� �� �� � ������ ����� ������� ��� �� �� �� �� ��� ���"�’����� Figure 7. ADS-118/118A Evaluation Board Schematic (ADS-B118) ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters MECHANICAL DIMENSIONS INCHES (mm) 1.31 MAX. (33.27) 24-Pin DDIP Versions Dimension Tolerances (unless otherwise indicated): 2 place decimal (.XX) ±0.010 (±0.254) 3 place decimal (.XXX) ±0.005 (±0.127) 24 13 Lead Material: Kovar alloy ADS-118MC 0.80 MAX. Lead Finish: 50 microinches (minimum) gold plating (20.32) ADS-118MM over 100 microinches (nominal) nickel plating 112 ADS-118AMC ADS-118AMM 0.100 TYP. (2.540) 1.100 (27.940) 0.235 MAX. (5.969) PIN 1 INDEX 0.200 MAX. (5.080) +0.002 0.010 –0.001 (0.254) 0.190 MAX. 0.100 0.100 (4.826) (2.540) (2.540) 0.600 ±0.010 SEATING (15.240) PLANE 0.040 0.018 ±0.002 0.025 (1.016) (0.457) (0.635) 1.31 MAX. (33.02) 24-Pin Dimension Tolerances (unless otherwise indicated): 24 13 Surface Mount 2 place decimal (.XX) ±0.010 (±0.254) 3 place decimal (.XXX) ±0.005 (±0.127) Versions Lead Material: Kovar alloy 0.80 MAX. Lead Finish: 50 microinches (minimum) gold plating (20.32) Contact Factory over 100 microinches (nominal) nickel plating 1 12 0.020 TYP. 0.060 TYP. 0.015 (0.508) (1.524) 0.190 MAX. (0.381) (4.826) MAX. radius 0.130 TYP. PIN 1 for any pin (3.302) INDEX 0.100 (2.540) 0.020 0.010 TYP. (0.508) (0.254) 0.100 TYP. 0.040 (2.540) (1.016) DATEL, Inc. 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com 26 Jun 2015 ADS-118.B05 Page 8 of 9 ADS-118, ADS-118A 12-Bit, 5MHz, Low-Power Sampling A/D Converters ORDERING GUIDE OPERATING MODEL NUMBER PACKAGE ROHS TEMPERATURE RANGE Input Range ±1V ADS-118MC 0 to +70°C TDIP No ADS-118MC-C 0 to +70°C TDIP Yes ADS-118ME –40to +100°C TDIP No ADS-118ME-C –40to +100°C TDIP Yes ADS-118MM –55to +125°C TDIP No ADS-118MM-C –55to +125°C TDIP Yes ADS-118/883 –55to +125°C TDIP No ADS-118-C/883 –55to +125°C TDIP Yes Input Range ±1.25V ADS-118AMC 0 to +70°C TDIP No ADS-118AMC-C 0 to +70°C TDIP Yes ADS-118AME –40to +100°C TDIP No ADS-118AME-C –40to +100°C TDIP Yes ADS-118AMM –55to +125°C TDIP No ADS-118AMM-C –55to +125°C TDIP Yes ADS-118AMM/883 –55to +125°C TDIP No ADS-118AMM-C/883 –55to +125°C TDIP Yes DATEL is a registered trademark of DATEL, Inc. DATEL, Inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 USA licenses to make, use, or sell equipment constructed in accordance therewith. Specifi cations are subject to change without notice. ITAR and ISO 9001/14001 REGISTERED © 2015 DATEL, Inc. www.datel.com • e-mail: help@datel.com 26 Jun 2015 ADS-118.B05 Page 9 of 9